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Sunderarajan S. Mohan

dblp:69/6673 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 50% Electronic design automation · 50%
Theoretical computer science
1 paper
Mathematical optimization · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits
analog circuit design
0.011999
Optimization of Inductor Circuits via Geometric Programming · DAC 1999
Electronic design automation
geometric programming
0.011999
Optimization of Inductor Circuits via Geometric Programming · DAC 1999
Mathematical optimization › continuous optimization
convex optimization
0.011999
Optimization of Inductor Circuits via Geometric Programming · DAC 1999
Mathematical optimization › continuous optimization › convex optimization
geometric programming
0.011999
Optimization of Inductor Circuits via Geometric Programming · DAC 1999

Methods — techniques the papers use, named apart from their topics

geometric programming · 0.0interior-point method · 0.0interior point method · 0.0
YearPublicationVenuePosition
1999 Optimization of Inductor Circuits via Geometric Programming
abstract
We present an efficient method for optimal design and synthesis of CMOS inductors for use in RF circuits.This method uses the the physical dimensions of the inductor as the design parameters and handles a variety of specifications including fixed value of inductance, minimum self-resonant frequency, minimum quality factor, etc. Geometric constraints that can be handled include maximum and minimum values for every design parameter and a limit on total area.Our method is based on formulating the design problem as a special type of optimization problem called geometric programming, for which powerful efficient interior-point methods have recently been developed.This allows us to solve the inductor synthesis problem globally and extremely efficiently.Also, we can rapidly compute globally optimal trade-off curves between competing objectives such as quality factor and total inductor area.We have fabricated a number of inductors designed by the method, and found good agreement between the experimental data and the specifications predicted by our method.
Maria del Mar Hershenson, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee
DAC2
1999 Design and optimization of LC oscillators
abstract
Presents a method for optimizing and automating component and transistor sizing for CMOS LC oscillators. We observe that the performance measures can be formulated as posynomial functions of the design variables. As a result, the LC oscillator design problems can be posed as a geometric program, a special type of optimization problem for which very efficient global optimization methods have recently been developed. The synthesis method is therefore fast, and determines the globally optimal design; in particular, the final solution is completely independent of the starting point (which can even be infeasible), and infeasible specifications are unambiguously detected. We can rapidly compute globally optimal trade-off curves between competing objectives such as phase noise and power.
Maria del Mar Hershenson, Ali Hajimiri, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee
ICCAD3