This paper proposes a methodology for performing an evaluation and optimization of the cost of an ATM switching architecture under performance constraints given in terms of virtual connection blocking probability. An analysis of blocking networks is developed, and combined with known results concerning nonblocking networks, provides a theoretical model which relates traffic characteristics, network topology and blocking probability in a multirate/multiservice broadband environment. An analysis of the characteristics determining the cost of a generic ATM switch implementation follows. The model is oriented to optimize both the topological parameters and the speed advantage, with respect to the main cost factors of VLSI-based switching networks i.e., components count and complexity, interconnection costs.>

The authors propose a methodology for performing an evaluation and optimization of the cost of an asynchronous transfer mode (ATM) switching architecture under performance constraints given in terms of virtual connection blocking probability. An analysis of blocking networks is developed and combined with known results concerning nonblocking networks that provide a theoretical model which relates traffic characteristics, network topology, and blocking probability in a multirate/multiservice broadband environment. An analysis of the characteristics determining the cost of a generic ATM switch implementation follows. The model is oriented to optimize both the topological parameters and the speed advantage, with respect to the main cost factors of VLSI-based switching networks.>