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Alec G. Stanculescu

dblp:70/1683 · DBLP profile ↗
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3ranked-venue papers
1as first author
0since 2021 · last 1989
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
compiler construction
0.011989
A VHDL Compiler Based on Attribute Grammar Methodology · PLDI 1989
Electronic design automation › hardware verification and test
formal verification
0.011988
Verification of VHDL Designs Using VAL · DAC 1988
Electronic design automation
hardware verification and test
0.011988
Verification of VHDL Designs Using VAL · DAC 1988
Electronic design automation › high-level synthesis › hardware generation
hardware description language generation
0.011989
A VHDL Compiler Based on Attribute Grammar Methodology · PLDI 1989

Methods — techniques the papers use, named apart from their topics

attribute grammars · 0.0attribute grammar · 0.0VAL · 0.0
YearPublicationVenuePosition
1989 Switch-level VHDL descriptions
abstract
The authors show that switched-level models can be written in VHDL (VHSIC hardware descriptive language) without special-purpose knowledge in the VHDL simulator. As a result, such VHDL switch-level descriptions may be executed on any simulator supporting the VHDL. The authors present a VHDL switch-level value system, discuss resolution functions, modeling tools written in VHDL, and describe an algorithm coded in VHDL for the modeling of bidirectional pass transistors.>
Alec G. Stanculescu, Andy S. Tsay, Alex N. D. Zamfirescu, D. L. Perry
ICCAD1
1989 A VHDL Compiler Based on Attribute Grammar Methodology
abstract
This paper presents aspects of a compiler for a new hardware description language (VHDL) written using attribute grammar techniques. VHDL is introduced, along with the new compiler challenges brought by a language that extends an Ada subset for the purpose of describing hardware. Attribute grammar programming solutions are presented for some of the language challenges.
Rodney Farrow, Alec G. Stanculescu
PLDI2
1988 Verification of VHDL Designs Using VAL
Larry M. Augustin, Benoit A. Gennart, Youm Huh, David C. Luckham, Alec G. Stanculescu
DAC5