The design of large devices suggests fundamental and efficient innovation in the field programmable gate array (FPGA) interconnect structure to improve power consumption, density, and performance. Mesh-based FPGA architectures are generally designed to maximize logic utilization and to ensure layout scalability whereas tree-based FPGA architectures are designed to increase interconnect utilization. In this article, we propose a new mesh of trees (MoTs) FPGA architecture where we try to benefit from mesh of clusters (MoCs) FPGA layout scalability and tree-based FPGA efficient intracluster interconnect utilization, thanks to the butterfly fat-tree (BFT) topology. In order to attain the efficient use of the proposed routing interconnect resources, we develop computer-aided design (CAD) tools that respond to the target MoTs FPGA features. In addition, we define the power, area, and delay metric models according to the proposed architecture criteria. The experimentation results show that MoTs architecture with a cluster arity 32 offers the best tradeoff between power, area, and delay. Furthermore, we conduct a comparison between MoTs and MoCs FPGAs in general and the best MoTs and MoCs solutions, which ensure the best tradeoff between power, area, and delay in particular. The results show that the best MoTs architecture reduces power, area, delay, and energy by an average of 29%, 6%, 40%, and 47%, respectively, in comparison with the best MoCs architecture.

Flexibility, low latency, energy-efficiency, and low area, power, and cost are very important to consider for hardware and software implementation of VLSI circuits. With the advanced technology used to design these circuits especially the System on Chip, embedded FPGA (eFPGA) is one of the fields that has attracted extensive attention to ensure flexibility into SoC. Matrix and hierarchical architectures are the two most popular architectures used to design an FPGA. This paper present firstly an embedded FPGA with hierarchical architecture, the configuration of this eFPGA is ensured by a loader with a proposed model. Then, we propose the first embedded FPGA having a matrix architecture with a multi-level switch box. With the best of our knowledge, this is the first work that presents a decoder which loads the bitstream words to eFPGA SRAMs cells for the mesh of cluster architectures. A series of experimentation is conducted to evaluate the proposed eFPGAs. The static power, latency, and hardware utilization, as well as hardware implementation, are discussed and analyzed. Mesh of cluster eFPGA introduces an area overhead ≈ 2 times of tree eFPGA size which is correlated to static power but has a straightforward benefit in terms of frequency and performance, regularity, and easy to implement.

The leak problem in water distribution systems has attracted the attention of many researchers during the past few decades. Water losses through leakages represent an issue that has negative impacts on the environmental and economic systems. Detecting and locating the source of leakage in the water distribution network can significantly reduce the amount of water lost and prevent the destruction of the infrastructure due to water leakage. In this paper, several methods for water leak detection are presented while indicating their advantages and drawbacks. In addition, a new technique based on using multiple sensing wires with different lengths is proposed. This solution consists in detecting and locating water leak by measuring the variations in soil moisture. The experiments made are presented to prove the simplicity, ease of use and the ability of the proposed technique to detect and pinpoint the location of water leak in underground pipelines.

Having high efficiently embedded systems is important for various applications, especially, for modern communication systems, wireless sensor networks, mobile networks, and digital storage systems. Therefore, an efficient error control and correction solution in digital data is an important issue to ensure data protection. In this context, Reed Solomon codes are often used for error corrections. These embedded applications are implemented as software cores, hardware cores or a mixture of software-hardware Intellectual Property (IPs). In this paper authors proposes an efficient metric to improve performance, flexibility and cost of Reed Solomon (RS) Encoder by implementing this algorithm in Re-configurable System on Chip (SoC). The proposed system is composed of a low power ARM processor connected to a hierarchical embedded Field Programmable Gate Array (FPGA) to ensure the acceleration task with the best low-latency which targets a wide range of applications. This is the first reconfigurable SoC composed by Tree-based embedded FPGA that targets the RS-Encoder algorithm. The first contribution is the design of a complete SoC integrating a software embedded FPGA (eFPGA) which is fully synthesized and implemented into an FPGA platform. The second added value is that the embedded FPGA size can go up to 4 KLUTS with a big number of inputs/outputs. The third contribution is that the proposed SoC targets one of the most powerful algorithms. The eFPGA integration introduces a chip area overhead but it proves interesting results in terms of run-time. Indeed, for 100 software instructions, the eFPGA is faster 4 times compared to a hardware accelerator and 412 times compared to the software implementation of the RS algorithm.

Computer-Aided Design (CAD) tools represent a major factor to enhance the quality of Field Programmable Gate Arrays (FPGAs) and use their architectural resources to their full potential. Since they can be developed to satisfy application constraints like surface, speed and energy while responding to Time-to-market requirements. In this paper, we explore the impact of T-VPack and First Choice (FC) clustering algorithms on the performance of Multilevel Switch Boxes (MS) FPGA with Long Wires (LWs). Indeed, the performance of an FPGA is highly sensitive to the mapping of Logic Blocks (LBs) on FPGA architecture. This work shows that FC ameliorates power consumption, area, critical path delay and energy compared to T-VPack.

Wireless sensor networks (WSNs) have been widely deployed in many areas. Water pipeline monitoring is among the areas where WSNs have a great effect on their supervision. However, it is critical to control the power consumption of the sensor nodes to achieve the maximum WSNs' operation time. In this paper, we study the linear sensor placement problem in order to maximize the lifetime of sensor nodes used to monitor water pipelines. An efficient equal-distance placement scheme is proposed. The evaluation results using Mathworks Matlab show that our energy aware linear sensor placement scheme improves the WSN's lifetime. The effect of scaling the number of nodes on the transmission power is also tested in this paper.

Large quantities of water are wasted daily due to leakages in pipelines. In order to decrease this waste and preserve water, advanced systems could be used. In this context, a Wireless Sensor Network (WSN) is increasingly required to optimize the reliability of the inspection and improve the accuracy of the water pipeline monitoring. A WSN solution is proposed in this paper with a view to detecting and locating leaks for long distance pipelines. It combines powerful leak detection and localization algorithms and an efficient wireless sensor node System on Chip (SoC) architecture. In fact, a novel hybrid Water Pipeline Monitoring (WPM) method has been proposed using Leak detection Predictive Kalman Filter (LPKF) and Modified Time Difference of Arrival (TDOA) method based on pressure measurements. The data collected from sensors are filtered, analyzed and compressed with the same Kalman Filter (KF) based algorithm instead of using various algorithms that deeply damage the battery of the node. The local low power pre-processing is efficient to save the power of the sensor nodes. Moreover, a laboratory testbed has been constructed using plumbing components and validated by an ARM-based prototyping platform with pressure sensors.

Energy saving strategies pose challenges for wireless Sensor Networks communication, as the nodes have limited energy resources and are battery powered. Thus, there is a strong interest in developing energy efficient transmission techniques. In this paper, we present a new approach to minimize the energy consumption of clustered wireless sensor networks, while achieving the required level of reliability. We consider clusters where sensors transmit monitored data to nearby cluster-head using cooperative communication. The goal of our approach is to minimize the transmit power energy based on Bit Error Probability (BEP) criterion for selective digital relaying (SDR) schemes whose closed form expression was recently derived in previous works. Therefore, the proposed scheme can efficiently allocate the least transmission power among the source and the relays that satisfy the predefined level of reliability while decreasing the energy consumption of the node. Simulation results show that our relay selection algorithm achieves significant energy savings (more than 50% compared with direct transmissions for moderate SNR values and up to 90% in high SNR regions).

Recently, using Wireless Sensors Networks has increased rapidly in different domains. This advance has provides many solutions in several everyday life fields. Nevertheless, many problems of security and especially energy consumption have emerged. Due to this reasons many works propose solutions to increase the level of security and especially secure group communications. The communication requires common group key for protection of control messages and data reports. The group key should be updated when a node is compromised or a node leaves the group or a new node joins the group to achieve forward and backward security. It is in this context that our works was oriented to propose a new authentication scheme to improve the rekeying message authentication. Experimental results using real platform TelosB motes with tinyos operating system validate the efficiency of our proposed solution.

Recently, using Wireless Sensor Networks (WSNs) is increasing in many areas, whether scientific, logistic, military, health and water monitoring. Water is among the vital material transported by pipeline systems. Any leakage in the pipe can cause major financial losses and possible environmental damages. Therefore, it is necessary to have a real time leak detection system. WSNs can play an important role to effectively detect the leak and minimize the water loss. Sensor size, however, is a significant limitation in terms of energy autonomy. In fact, the battery is very small and in general, it is not replaceable or rechargeable. Therefore, many studies are currently focusing on the management of the energy consumed by sensor nodes. In this paper, we propose a new energy efficient scheme for leak detection in water pipeline based on WSNs. The main goal of our proposal is to solve the problem of losing water and ameliorate network lifetime by reducing energy needs. The proposed scheme is composed of three tasks: deployment of sensors, routing and replacement of failed nodes. Simulations results validate the choice of the best cluster based routing protocol which will be executed in the second task of the proposed scheme.