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ShaoWei Pan

dblp:70/3020 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 62% Integrated circuit design · 38%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.011993
SaPOSM: an optimization method applied to parameter extraction of MOSFET models · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation
circuit simulation
0.011993
SaPOSM: an optimization method applied to parameter extraction of MOSFET models · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation
design optimization
0.011993
PYFS-a statistical optimization method for integrated circuit yield enhancement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Integrated circuit design › analog and mixed-signal circuits › device modeling
device model parameter extraction
0.011993
SaPOSM: an optimization method applied to parameter extraction of MOSFET models · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Integrated circuit design › analog and mixed-signal circuits › device modeling
MOSFET modeling
0.011993
SaPOSM: an optimization method applied to parameter extraction of MOSFET models · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › design optimization
response surface modeling
0.011993
PYFS-a statistical optimization method for integrated circuit yield enhancement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › design for manufacturability
statistical design
0.011993
PYFS-a statistical optimization method for integrated circuit yield enhancement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › design for manufacturability › design for yield
yield enhancement
0.011993
PYFS-a statistical optimization method for integrated circuit yield enhancement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993

Methods — techniques the papers use, named apart from their topics

simulated annealing · 0.0response surface method · 0.0pseudo yield function substitution · 0.0deterministic optimization · 0.0POSM · 0.0
YearPublicationVenuePosition
1993 SaPOSM: an optimization method applied to parameter extraction of MOSFET models
abstract
Points out that SaPOSM integrates an efficient deterministic optimization algorithm, called POSM, with the popular stochastic optimization paradigm simulated annealing (SA). It offers great promise for improving the optimization results significantly while using only a moderate amount of computing time. Tested on a suite of multi-minima optimization benchmark problems, SaPOSM's performance rivals a recently reported fast simulated diffusion method. SaPOSM was used to extract the parameters of state-of-the-art submicron (0.3- mu m channel length) MOSFET transistors, and very favorable results have been obtained. For a second difficult parameter extraction problem (18 parameters, five different channel lengths), simulation results indicate that SaPOSM achieves performance comparable to the SA method. Specifically, both SA and SaPOSM are able to minimize the modeling error to several orders of magnitude smaller than that obtained using POSM alone. At the same time, the computing time taken by SaPOSM is only a very small fraction of that taken by the SA method.>
Yu Hen Hu, ShaoWei Pan
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1993 PYFS-a statistical optimization method for integrated circuit yield enhancement
abstract
An efficient optimization method for the statistical design of integrated circuits is presented. This method, called the pseudo yield function substitution (PYFS) algorithm, is developed to help a designer select design parameters to maximize the product yield. The design goal of PYFS is to use fewer simulation runs to reach a yield-optimized design. This is accomplished with the development of an improved response surface method for accurate estimation of the circuit response function, and the use of a novel PYFS method for yield maximization.>
ShaoWei Pan, Yu Hen Hu
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1