Healthcare applications create an ecosystem that combine IoT networks, servers and intelligence to enable patient’s care and real time emergency services. This ecosystem faces many challenges as the high complexity, cost and security. This can be decreased by enhancing medical data management, utilization of strong cryptographic primitives, and blockchain platforms. In this context, we present a hierarchical system architecture which aims to preserve electronic health records security and privacy. Our security design is adapted to the defined clustered network architecture. For intra-cluster communication pattern, we propose a key sharing protocol which includes a registration phase, a login phase and a Diffie Hellman key agreement scheme. For inter-cluster communications, Hyperledger Fabric blockchain platform is used to ensure security and trust among different healthcare actors. Blockchain is a decentralized and transparent approach that enables data provenance, auditability, reliability, and trustworthy features. Additionally, EHR data is stored in a an off-chain decentralized database named InterPlanetary File System while keeping their hash stored in the blockchain ledger through the execution of smart contracts. The security strength of our proposal is analyzed to show its robustness in defending different security attacks such as masquerade, replay, and data sniffing attacks. Further, the performance analysis shows that the proposed blockchain-based solution ensures high network performances in terms of transactions latency and throughput outperforming existing protocols.

Traditional leak detection methods must be improved to address leakage from aging water and sewer pipes. Machine Learning (ML) methods are used to replace traditional manual work in leak detection. Environmental and economic conditions are adversely affected by water leaks in pipelines. The data collected by WSNs may, however, be vulnerable to malicious attacks, posing a threat to the system's security and privacy. This process relies on Blockchain technology for security, traceability, and integrity of data. In this paper, we propose to combine Linear Discriminant Analysis (LDA) with K-Nearest Neighbors (KNN). Based on WSNs implemented in water pipelines, we strive to classify specific events as normal or abnormal. A comparison between our adopted technique and random forest (RF) and support vector machine (SVM) was performed in order to assess the accuracy, precision, recall, and F1 score of our chosen technique. A total of 9.13 %, 8.42 %, and 7.21% of false positives were found in all three models, indicating that they were all below 10 %. This model achieved the highest accuracy and efficiency in water leak detection and data management, with minimal false positives (7.21 %) using a real dataset.

Automatic classification of bone metastases is a major challenge and is receiving increasing attention from the research community. One of the major challenges is the accurate classification of medical images, especially the distinction between benign and malignant images, which can greatly help physicians in decision-making. Recently, several deep-learning techniques have been proposed for medical image classification. Their performance, however, is influenced by both the dataset and the imaging modality. In this work, we investigate the performance of several state-of-the-art CNN architectures, namely InceptionV3, EfficientNet, ResNext50, and DenseNet161, as well as Transformer architectures, namely ViT and DeiT. We trained and tested these algorithms on a large dataset consisting of CT-scan images. The Transformer algorithms were found to be superior to CNN algorithms in detecting bone metastases. In particular, ViT Tiny achieved the best performance in terms of accuracy and F1-score as compared to other architectures.

IoT healthcare systems aim to help patients to monitor their own condition and connect and interact with healthcare professionals. However, patients' privacy and sensitive data security are big issues which should be considered. Healthcare systems absolutely depend on 6G technologies due to its important characteristics. This paper provides a light mutual authentication and a secure data transmission in 6G/IoT healthcare system. Our proposal takes into account the emergency cases and non-emergency ones. We introduce a light authentication and a secure health data transmission between health service provider and health user. Then, we proceed a mutual authentication algorithm between health user and health collaborator followed by a light key agreement establishment. We prove the security of the protocol against several knowns' attacks. Then, we compare our proposed solution with other related works, the findings show the performance in terms of communication and computational.

The ongoing deployment of 6G communications and the proliferation of Internet of Things (IoTs) faces several challenges such as user privacy and data security due to the huge number of intelligent IoT devices and intensive transmitted information in 6G network. Motivated by the above issues and the paramount importance of sensitive health data, in this paper, we present fast anonymous mutual authentication process for emergency healthcare system based on 6G/IoT network. The proposal does not include cloud trust authority when establishing mutual authentication. This, we guarantee data privacy, anonymous and lightweight authentication with low latency which are considered as the main feature of 6G/IoT communication. We prove the security of the protocol against several attacks. Then, we used AVISPA tool to validate security results. Moreover, the results demonstrate their performance in terms of communication and computational costs with respect to the relevant works.

Federated Learning (FL) is a feasible technology to collaboratively train a model without sharing private data. This approach differs from traditional machine learning techniques, which aggregate local datasets in a single server. Thus, FL is adopted in the Healthcare sector to preserve the privacy of collected sensitive medical data from heterogenous and resource-constrained Internet of Medical Things (IoMT). However, FL requires aggregating all trained local models in a central server that presents a single point of failure. To address this issue, we propose a novel Blockchain-based Federated Learning architecture, which is applied to detect malicious network traffic in IoMT environments. In this paper, the proposed architecture takes advantage of a Hyperledger Fabric channel coupled with FL to manage efficiently and securely the learning process of an Intrusion Detection System (IDS). The Blockchain channel replaces the commonly used central server with the traditional FL approach. Moreover, the proposed approach benefits from the inherent features of Blockchain and FL. Besides, it secures patient data collection from the IoMT by examining the network traffic for unauthorised behaviour or policy breaches.

Software Defined Network (SDN) is a new topology in the computer network; it offers several advantages such as virtualization and the division between the data plane and the control plane. These days we talk a lot about the SDN based on the vehicular network in particular on Vehicular Ad hoc Network VANET. The SDN solution in VANET is secure thanks to the presence of a controller, but this security remains insufficient which leads us to propose a more secure and lightweight solution. So our solution is composed of two phases; a phase for registering a vehicle near the VANET network controller, and a phase for authentication and generation session key between two vehicles. In both phases, we used Identity Based Encryption (IBE) to secure the exchange between the various entities of the architecture. We tested the performance of our solution by simulating it with the library MIRACL which offers implementations of elliptic curves and IBE. We have also formally validated our solution with Automated Validation of Internet Protocols and Applications (AVISPA). In conclusion, we have shown that our solution meets the security objectives of SDN in VANET while being a lightweight solution.

The design of large devices suggests fundamental and efficient innovation in the field programmable gate array (FPGA) interconnect structure to improve power consumption, density, and performance. Mesh-based FPGA architectures are generally designed to maximize logic utilization and to ensure layout scalability whereas tree-based FPGA architectures are designed to increase interconnect utilization. In this article, we propose a new mesh of trees (MoTs) FPGA architecture where we try to benefit from mesh of clusters (MoCs) FPGA layout scalability and tree-based FPGA efficient intracluster interconnect utilization, thanks to the butterfly fat-tree (BFT) topology. In order to attain the efficient use of the proposed routing interconnect resources, we develop computer-aided design (CAD) tools that respond to the target MoTs FPGA features. In addition, we define the power, area, and delay metric models according to the proposed architecture criteria. The experimentation results show that MoTs architecture with a cluster arity 32 offers the best tradeoff between power, area, and delay. Furthermore, we conduct a comparison between MoTs and MoCs FPGAs in general and the best MoTs and MoCs solutions, which ensure the best tradeoff between power, area, and delay in particular. The results show that the best MoTs architecture reduces power, area, delay, and energy by an average of 29%, 6%, 40%, and 47%, respectively, in comparison with the best MoCs architecture.

In the past few years, an increasing number of machine-learning and deep learning structures, such as Convolutional Neural Networks (CNNs), have been applied to solving a wide range of real-life problems. However, these architectures are vulnerable to adversarial attacks: inputs crafted carefully to force the system output to a wrong label. Since machine-learning is being deployed in safety-critical and security-sensitive domains, such attacks may have catastrophic security and safety consequences. In this paper, we propose for the first time to use hardware-supported approximate computing to improve the robustness of machine learning classifiers. We show that our approximate computing implementation achieves robustness across a wide range of attack scenarios. Specifically, we show that successful adversarial attacks against the exact classifier have poor transferability to the approximate implementation. The transferability is even poorer for the black-box attack scenarios, where adversarial attacks are generated using a proxy model. Surprisingly, the robustness advantages also apply to white-box attacks where the attacker has unrestricted access to the approximate classifier implementation: in this case, we show that substantially higher levels of adversarial noise are needed to produce adversarial examples. Furthermore, our approximate computing model maintains the same level in terms of classification accuracy, does not require retraining, and reduces resource utilization and energy consumption of the CNN. We conducted extensive experiments on a set of strong adversarial attacks; We empirically show that the proposed implementation increases the robustness of a LeNet-5 and an Alexnet CNNs by up to 99% and 87%, respectively for strong transferability-based attacks along with up to 50% saving in energy consumption due to the simpler nature of the approximate logic. We also show that a white-box attack requires a remarkably higher noise budget to fool the approximate classifier, causing an average of 4 dB degradation of the PSNR of the input image relative to the images that succeed in fooling the exact classifier.

In our life, water is considered as an essential resource. Pipelines are taken into consideration as one of the best solutions to transport water through long distance. Due to the existence of the harsh environmental condition, many detection methods are developed to monitoring pipelines. But these latter are not effective to leak detection. Most current solutions need to be improved to help in damage detection. To monitoring water pipeline, we use the Wireless Sensors Networks (WSNs) in this way. WSNs are employed now upward of domains like transport, military, agriculture, health care$\ldots$Kernel principal component analysis (KPCA), also called the kernelized version, are developed to capture the nonlinear data structure. KPCA is derived from the Gram matrix which is not robust when the data contain outliers. In this paper, we develop a new technique that takes into account low-cost and real-time damage detection for outlier. Our proposed technique is based on Adaptive Kernel Principal Component Analysis (AKPCA). This latter help to differentiate the type of data as normal or outlier in the field of water pipeline based on WSN. In the experiments, real data are used for outlier detection to verify the method’s effectiveness. However, our proposed work shows a better performance to detecting outliers.

The Internet of Things (IoT) technology based on intelligent sensors and physical object networks represents a prominent solution to supervise the water pipe and transmit reliable data in a power-aware way. Since the communication process is the most consuming task, we propose an IoT-based sensor node with reliable and energy-efficient abilities. The proposed Arduino-based sensor node system can detect environment parameters within the sensing range and routing data over multi-hops in a reliable and power-efficient way to nodes within its communication range. The details of the efficient and reliable routing mechanism are explained. The proposed prototype is tested in a real environment installed in the research center for validation purposes and performance evaluation.

Remote Patient Monitoring (RPM) is a form of telehealth or virtual health that strengthens online medical services and allows delivering healthcare remotely. Nowadays, remote patient monitoring systems (RPMS) are widely used by healthcare providers to remotely monitor the vital signs of patients. As the RPM field expands, concerns about efficient and secure medical data transmission are raised. This kind of patient medical data is collected by the mean of Internet of Healthcare Things (IoHT) or sometimes denoted as Internet of Medical Things (IoMT) devices. The collected data needs to be stored and retrieved with highly assured levels of security and privacy as the data comprises private and critical patients’ information. To secure medical data, this paper proposes a blockchain-based architecture to manage access control to medical data and to preserve patient’s data privacy. The blockchain-based system is built on Hyperledger Fabric, a permissioned distributed ledger solution, and the ledgers and transactions are stored in the cloud. The proposed architecture is designed to contribute to the robustness of the RPM systems and to avoid recorded security limitations in commonly used permissioned blockchains methods. Performance evaluation has proved the robustness and superiority of the proposed system in terms of data confidentiality, integrity, availability, traceability, scalability, and data privacy while integrated with the RPM services.

Flexibility, low latency, energy-efficiency, and low area, power, and cost are very important to consider for hardware and software implementation of VLSI circuits. With the advanced technology used to design these circuits especially the System on Chip, embedded FPGA (eFPGA) is one of the fields that has attracted extensive attention to ensure flexibility into SoC. Matrix and hierarchical architectures are the two most popular architectures used to design an FPGA. This paper present firstly an embedded FPGA with hierarchical architecture, the configuration of this eFPGA is ensured by a loader with a proposed model. Then, we propose the first embedded FPGA having a matrix architecture with a multi-level switch box. With the best of our knowledge, this is the first work that presents a decoder which loads the bitstream words to eFPGA SRAMs cells for the mesh of cluster architectures. A series of experimentation is conducted to evaluate the proposed eFPGAs. The static power, latency, and hardware utilization, as well as hardware implementation, are discussed and analyzed. Mesh of cluster eFPGA introduces an area overhead ≈ 2 times of tree eFPGA size which is correlated to static power but has a straightforward benefit in terms of frequency and performance, regularity, and easy to implement.

Wrist-based fall detection system provides a very comfortable and multi-modal healthcare solution, especially for elderly risking falls. However, the wrist location presents a very challenging and unstable spot to distinguish falls among other daily activities. In this paper, we propose a Supervised Dictionary Learning approach for wrist-based fall detection. Three Dictionary learning algorithms for classification are invoked in this study, namely SRC, FDDL, and LRSDL. To extract the best descriptive representation of the signal data we followed different preprocessing scenarios based on accelerometer, gyroscope, and magnetometer. A considerable overall performance was obtained by the SRC algorithms reaching respectively 99.8%, 100%, and 96.6% of accuracy, sensitivity, and specificity using raw data provided by a triaxial accelerometer, accordingly overthrowing previously proposed methods for wrist placement.

Blockchain is a rich and attractive domain for researchers since it is independent of “third party” such as Bank or government. This “open” phenomenon does not respect all the security criteria such as private data protection and confidentiality; hence, we cannot trust this approach despite its contributions. Blockchain technology has gained considerable progress in recent years in fields such as e-health. The medical data contains personal and sensitive information that must be preserved. The current Blockchain systems suffer from serious practical limitations, e.g. poor performance, high-energy consumption and lack of confidentiality. On the other hand, Trust Execution Environment TEE is imperfect; it is based on the centralization of data. To avoid data centralization and its limitations, an approach based on collecting the necessary data from distributed database is presented in this paper. Our goals are to protect the user’s privacy and to execute it in TEE combined with Multi - party computation MPC. We proof by security analysis that our new solution meets the fundamental criteria of security such as confidentiality and privacy.

The leak problem in water distribution systems has attracted the attention of many researchers during the past few decades. Water losses through leakages represent an issue that has negative impacts on the environmental and economic systems. Detecting and locating the source of leakage in the water distribution network can significantly reduce the amount of water lost and prevent the destruction of the infrastructure due to water leakage. In this paper, several methods for water leak detection are presented while indicating their advantages and drawbacks. In addition, a new technique based on using multiple sensing wires with different lengths is proposed. This solution consists in detecting and locating water leak by measuring the variations in soil moisture. The experiments made are presented to prove the simplicity, ease of use and the ability of the proposed technique to detect and pinpoint the location of water leak in underground pipelines.

Having high efficiently embedded systems is important for various applications, especially, for modern communication systems, wireless sensor networks, mobile networks, and digital storage systems. Therefore, an efficient error control and correction solution in digital data is an important issue to ensure data protection. In this context, Reed Solomon codes are often used for error corrections. These embedded applications are implemented as software cores, hardware cores or a mixture of software-hardware Intellectual Property (IPs). In this paper authors proposes an efficient metric to improve performance, flexibility and cost of Reed Solomon (RS) Encoder by implementing this algorithm in Re-configurable System on Chip (SoC). The proposed system is composed of a low power ARM processor connected to a hierarchical embedded Field Programmable Gate Array (FPGA) to ensure the acceleration task with the best low-latency which targets a wide range of applications. This is the first reconfigurable SoC composed by Tree-based embedded FPGA that targets the RS-Encoder algorithm. The first contribution is the design of a complete SoC integrating a software embedded FPGA (eFPGA) which is fully synthesized and implemented into an FPGA platform. The second added value is that the embedded FPGA size can go up to 4 KLUTS with a big number of inputs/outputs. The third contribution is that the proposed SoC targets one of the most powerful algorithms. The eFPGA integration introduces a chip area overhead but it proves interesting results in terms of run-time. Indeed, for 100 software instructions, the eFPGA is faster 4 times compared to a hardware accelerator and 412 times compared to the software implementation of the RS algorithm.

Anomalies detection in video footage is a daunting task treated with many challenges in crowded scenes. In this paper, we propose an efficient method based on deep learning and handcrafted spatio-temporal feature extraction for anomaly detection using a pre-trained CNN (convolution neural network) and HOF (Histogram of Optical Flow) features. Abnormal motion is picked by relative thresholding. One-class SVM is trained with spatial features for robust classification of abnormal shapes. Moreover, a decision function is applied to correct the false alarms and the miss detections. Our method has a high performance in terms of speed and accuracy. It achieved anomaly detection with good efficiency in challenging datasets and reduced computational complexity compared to state-of-the-art methods.

The Fog-assisted Social Internet of Things (FSIoT) is an emergent paradigm that brought new opportunities in terms of service provisioning in the IoT-Fog network. Therefore, in such environment, the establishment of secure and trust communication scheme is a crucial need between peer IoT devices having similar social profiles. In this context, we propose a Conditional Authentication and Session Key establishment (CASK)-Algorithm for a fog-assisted Social IoT environment. The algorithm allows users profile matching before establishing the authenticated session key. CASK is performed using ECC and one_way hash function. Comparing to the existing works, our solution presents many advantages in terms of security aspects, efficiency, social-awareness and reduced computation overheads.

Authentication is an important and challenging issue for the security of fog computing where fog nodes afford several services (storage, service access, computing, ..) to edge users. Operators and cloud service providers try to take profit from this paradigm to be closer to customers and satisfy their desires. They try to ensure privacy and secure mutual authentication between users and fog nodes when accessing services. The mainly existing fog-based authentication solutions didn't achieve complete security needs and/or have large computation overheads. In this paper, SAMAFog: a service aware and efficient mutual authentication protocol for the fog network is proposed. The mutual authentication between fog servers and users and the establishment of the session key are ensured using low-cost cryptographic primitives such as ECC and one_way hash function. The security features of the proposed scheme are formally evaluated using BAN-Logic method and AVISPA tool. In addition, comparative performance analysis is given among our scheme and relevant protocols. The results of comparative analysis illustrate that the proposed protocol provides robust, lightweight and efficient security performance for mutual authentication in fog environment.

Computer-Aided Design (CAD) tools represent a major factor to enhance the quality of Field Programmable Gate Arrays (FPGAs) and use their architectural resources to their full potential. Since they can be developed to satisfy application constraints like surface, speed and energy while responding to Time-to-market requirements. In this paper, we explore the impact of T-VPack and First Choice (FC) clustering algorithms on the performance of Multilevel Switch Boxes (MS) FPGA with Long Wires (LWs). Indeed, the performance of an FPGA is highly sensitive to the mapping of Logic Blocks (LBs) on FPGA architecture. This work shows that FC ameliorates power consumption, area, critical path delay and energy compared to T-VPack.

Wireless sensor network (WSN) has emerged a wide range of applications due to its performance, low cost, flexibility, ease-to-use and its efficiency. One of its most significant applications is the leak detection and localization in water pipelines. Various projects and works are reported in this context. However, improvements still needed in this field especially in term of node design. In fact, WSN is composed of battery powered small nodes that are in charge of collecting and transmitting data wirelessly. These devices are energy constrained and not well evolved in water pipeline application. In this paper, we present sensor node prototypes for water pipeline application. Experimental and comparative studies have been performed for the different node's components to achieve a final adequate node design, DEEP. Various processing platforms, sensors, amplifiers and communication technologies are theoretically and experimentally studied and evaluated. The comparison and the results presented, in this paper will help node designer especially for water pipeline monitoring. Moreover, they permitted us to design DEEP, an energy-aware sensor node platform by the use of power management techniques.

Nowadays, Real-Time Embedded Systems (RTES) and particularly adaptive ones are gaining more use in several domains. They must be always consistent and available to preserve their usefulness and feasibility, as a response to environmental conditions, resources limitations and user requirements. For this reason, they are subject to anticipated and unanticipated runtime reconfigurations. The design of such systems requires an abstract representation of the execution context independently from low-level details, with lower complexity. In this context, designers adopt runtime models which need to be checked and validated at early stages of development. Besides, these models must be updated according to unpredictable execution changes. In the present paper, we propose an MDE-based approach that allows managing runtime adaptive RTES. Our proposal starts by specifying the behavior and structure of runtime adaptive systems. Then Model-to-Text (M2T) transformations allows us to generate configuration files to simulate adaptive systems behavior and evaluate their real-time constraints. An additional feature offered by our approach consists to monitor the execution context and update runtime models according to unanticipated reconfigurations.

Floating point arithmetic is one of the most commonly used units in nowadays computing systems and is deployed for a wide range of domains and applications. While floating point operators offer high precision calculations, a plethora of applications such as multimedia processing and machine learning tolerate errors and computation imprecision. In a context of limited power budget embedded systems, saving resources and energy with an acceptable precision loss is a challenging design task. Approximate computing is an emerging systems design paradigm that offers promising balance between accuracy on the one hand and power consumption and resource utilization on the other hand. While state of the art approximate techniques offer a wide design space at the operator level, few are the works that consider exploring different techniques to build a heterogeneous comprehensive approximate design. In this paper, we propose HEAP: a heterogeneous approximate floating point multiplier. Based on a design space exploration process, we present an approximation at the transistor level that reduces energy consumption of up to 68%. Experimental study on a set of machine learning applications shows promising results with comparable accuracy to exact multiplier based systems.

Wireless Sensor Networks (WSNs) are widely employed to solve several problems in different domains like agriculture, monitoring, health care. An outlier detection method is considered as a task of classifying data that is available during training. Also, this method is considered as a very important step in construction of sensor network systems to ensure data grade for perfect decision making. So, this task helps to create a gainful approach based on Non-Negative Matrix Factorization (NMF) to find out if data is normal regular or an outlier. The latter has been used for nonlinear instance which can give a highest order statistics. Then, it has showed excellent performance with accounts for an attractive capability and has been extensively investigated. In this work, we propose a Non-Negative Matrix Factorization (NMF) as new method for an outlier detection to separate an outlier data from a regular pattern of point distribution. Using real data collected from Grand St-Bernard and Intel Berkeley in wireless sensor networks, our proposed work show a better performance in detecting outliers.

Ensuring privacy of transited data is a pillar need in Internet of Things (IoT) and Wireless Sensor Networks (WSN). In these networks, mutual authentication can help fulfilling trust and confidence of exchanged data between two communicating entities. In this paper, a Light and Trust Anonymous Mutual Authentication (LTAMA)- Algorithm for IoT is proposed. Then, a light shared key is settled between anonymous nodes. LTAMA-Algorithm design is based on Identity Based Encryption (IBE); Private Key Generator (PKG) and Elliptic Curve Cryptography (ECC). An evaluation of security performance is described to demonstrate the efficiency of LTAMA-Algorithm.

Keeping a safe city against security breaches and acts of violence is something critical. In a smart video-surveillance system, multi-shot human re-identification is a major challenge because of the large variations in a human's appearance caused by different types of noise such as occlusion, viewpoint and illumination variations. In this paper, we propose a model based-on the analysis of all the video surveillance data extracted from camera networks by exploiting the performance of the space-time covariance descriptor. This model not only deals with one video frame as the majority of models, but also considers all the extracted groups of pictures to implicitly encode the described pedestrian in motion by the integration of time parameter with the appearance features such as color, gradient and LBP, and the clustering step. The experiments conducted on PRID dataset showed the importance of video surveillance data analytics in recognition rates.

In the three hierarchy architecture Edge-Fog-Cloud, delivering services with low latency is needed from the cloud to fog users with the intermediate of fog servers.Private and secure communication scheme will be necessary between fog users and dynamic fog servers. Fog servers are dynamic in joining and leaving the fog. This dynamic change of fogs must be transparent to the fog users. Our solution lies on the introduction of a mutual authentication between Fog users at the Edge of the network and the Fog servers at the Fog layer. We propose a fog user-fog server anonymous mutual authentication scheme in which fog user and fog server authenticate each other and establish a session key without disclosing user's real identity. Our scheme is based on Pseudonym Based Cryptography PBC, Elliptic Curve Discrete Logarithm Problem ECDLP and bilinear pairing to establish the session key.To evaluate the new solution, a security analysis and a formal validation with AVISPA are presented.

Pipelines constitute one of the most important ways to transport large amounts of water through long distance. However, existing damage detection methods do not well in monitoring pipelines due to the harsh environmental condition. for this reason, current systems need to be more automated, efficient and accurate for continuous supervising about damage. For this purpose, Wireless Sensors Networks (WSN) have been brought into the research community in the context of monitoring water pipeline. In this paper, we have discussed the task amounts to provide low-cost and real-time damage detection technique. Our proposed technique is based on Fisher discriminant analysis (FDA) coupled with Support Vector Machine (SVM). We aim to recognize data as normal or outlier to identify specific events based on WSN implemented in a water pipeline. Moreover, we have compared our adopted approach with other four classifiers including Bayesian Network, Neural Network, K-Nearest Neighbors and Decision Tree. Thus, the suggested technique is validated in terms of accuracy and training time.

The key agreement protocol is essential to secure communication between communicating entities. However, the new constrained devices such as smart sensors do not support the existing key agreement due to the computation overheads. In addition, ensuring trust between entities is a challenge task in the network. In this paper, a light-weighted and trusted key agreement protocol is proposed between anonymous users. It guarantees safe communication with light computation cost. The new designed protocol is based on Identity Based Encryption (IBE); Private Key Generator (PKG) and Pseudonym Based Cryptography (PBC). Moreover, an evaluation of performance related to security and cost is discussed to prove the protocol's efficiency sheet.

Modern System-on-Chip (SoC) designs are faced with many challenges among which efficient communication managing is one of the most important. On-chip communication architectures can have a strong impact on the performance of SoC designs. The traditional SoC interconnects, cannot keep up with the high demands of today's SoC. To address this problem, SoC makers propose new protocols to implement high performance data transfer. AMBA AXI4, is one of the widely used protocols as on-chip bus in recent Wireless Sensor Network SoCs. It includes three distinct interconnect protocols: stream, burst and lite. In this paper, we highlight the various parameters that must be taken into consideration to select the adequate interface for a given application. We analyze and compare the on-chip interfaces for hardware/software (HW/SW) communication when various code transformations are applied on the Zynq-7000 Xilinx platform. Many experiments have been conducted to evaluate the communication between the main processor and the reconfigurable hardware accelerators.

Nowadays, many wireless sensor networks have been distributed in the real world to collect valuable raw sensed data. The challenge is to extract high-level knowledge from this huge amount of data. However, the identification of outliers can lead to the discovery of useful and meaningful knowledge. In the field of wireless sensor networks, an outlier is defined as a measurement that deviates from the normal behavior of sensed data. Many detection techniques of outliers in WSNs have been extensively studied in the past decade and have focused on classic based algorithms. These techniques identify outlier in the real transaction dataset. This paper aims at providing a structured and comprehensive overview of the existing researches on classification based outlier detection techniques as applicable to WSNs. Thus, we have identified key hypotheses, which are used by these approaches to differentiate between normal and outlier behavior. In addition, this paper tries to provide an easier and a succinct understanding of the classification based techniques. Furthermore, we identified the advantages and disadvantages of different classification based techniques and we presented a comparative guide with useful paradigms for promoting outliers detection research in various WSN applications and suggested further opportunities for future research.

For classification data, we use Wireless sensor networks (WSNs) as hardware for collecting data from harsh environments and controlling important events in phenomena. To evaluate the quality of a sensor and its network, we use the accuracy of sensor readings as surely one of the most important measures. Therefore, for anomalous measurement, real time detection is required to guarantee the quality of data collected by these networks. In this case, the task amounts to create a useful model based on KPCA to recognize data as normal or outliers. On account of the attractive capability, KPCA-based methods have been extensively investigated, and have shown excellent performance. So, to extract relevant feature for classification and to prevent from the events, we use KPCA based on Mahalanobis kernel as a preprocessing step. In the original space, the totality of computation is done thus saving computing time. Then the classification was done on real Intel Berkeley data collecting from urban area. Compared to a standard KPCA, the results show that our method are specially designed to be used in the field of wireless sensor networks (WSNs).

Security and privacy are prominent tasks in resource constrained devises in Internet of Things (IoT) and Wireless Sensor Networks (WSN). Therefore, to ensure anonymity and trust, concealing nodes' real identity trust management are mandatory. The majority of exiting IoT security solutions didn't achieve complete security needs and/or have large computation overheads. In this paper, STAC-protocol, a secure and trust anonymous communication protocol for IOT is presented. It is applied in clustered network to achieve sender, receiver and link anonymity and trusted communication. STAC-protocol is based on lightweight key agreement protocol; the Identity Based Encryption (IBE) and Pseudonym Based Encryption (PBC). A security analysis and performance evaluation are discussed to prove the protocol's enhancement.

Modern System-on-Chip (SoC) designs face many challenges. Choosing the best communication protocol among the different processing nodes is one of the most important design decisions. On-chip communication architectures can have a significant impact on the performance of SoC designs. However, in most of the existing design tools, only the computation cost is accurately estimated. To address this challenge, we present a high-level analytical tool to estimate the data communication cost for hybrid CPU-FPGA architectures. The proposed model allows to estimate, rapidly and accurately, both computation and communication cost of applications containing multiple nested loops. This paper also explores the benefits of applying various optimization pragmas including dataflow and loop pipelining, at the compilation phase. Experimental results show that the proposed model provides accurate data communication estimation for hybrid CPUFPGA architectures.

Wireless sensor networks (WSNs) have been widely deployed in many areas. Water pipeline monitoring is among the areas where WSNs have a great effect on their supervision. However, it is critical to control the power consumption of the sensor nodes to achieve the maximum WSNs' operation time. In this paper, we study the linear sensor placement problem in order to maximize the lifetime of sensor nodes used to monitor water pipelines. An efficient equal-distance placement scheme is proposed. The evaluation results using Mathworks Matlab show that our energy aware linear sensor placement scheme improves the WSN's lifetime. The effect of scaling the number of nodes on the transmission power is also tested in this paper.

The adaptability of a web application is its ability to react depending on the needs and the preferences of users. Thus, user models, used by such adaptive user interface, contain personal information which is required for learning personalized process. Then, evaluation of web applications interests on how users can learn to achieve their objectives. To gather this information a variety of measures have been used. In this paper, we investigate and present our adaptive Web interface using a Bayesian networks approach and we give a special importance to the evaluation of this web interface. The experiments show that the adaptive Web interface provides results that satisfy the user. We confirmed that the adaptive user interface was more comfortable for use than the fixed user interface.

Large quantities of water are wasted daily due to leakages in pipelines. In order to decrease this waste and preserve water, advanced systems could be used. In this context, a Wireless Sensor Network (WSN) is increasingly required to optimize the reliability of the inspection and improve the accuracy of the water pipeline monitoring. A WSN solution is proposed in this paper with a view to detecting and locating leaks for long distance pipelines. It combines powerful leak detection and localization algorithms and an efficient wireless sensor node System on Chip (SoC) architecture. In fact, a novel hybrid Water Pipeline Monitoring (WPM) method has been proposed using Leak detection Predictive Kalman Filter (LPKF) and Modified Time Difference of Arrival (TDOA) method based on pressure measurements. The data collected from sensors are filtered, analyzed and compressed with the same Kalman Filter (KF) based algorithm instead of using various algorithms that deeply damage the battery of the node. The local low power pre-processing is efficient to save the power of the sensor nodes. Moreover, a laboratory testbed has been constructed using plumbing components and validated by an ARM-based prototyping platform with pressure sensors.

Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures have been widely deployed to run challenging high-performance computations. However, the ever greater demand for energy efficiency fosters energy budgeting in MP2SoC systems. Nowadays, having the appropriate Electronic Design Automation (EDA) tools for power estimation is mandatory. The major challenge for the design of such tools is to reach a better tradeoff between accuracy and time-to-market. This paper presents a Model Driven Engineering (MDE)-based energy-aware Design Space Exploration (DSE) approach allowing the designer to take the power consumption criterion into account early in the design flow. The originality of this approach is that it integrates the Energy-Aware Duplication (EAD) algorithm that strives to balance schedule lengths and energy savings by considering the most important sources of energy consumption in MP2SoC: the massive number of processing elements (PE) and the high-speed Network-on-Chip (NoC). To demonstrate the effectiveness of the proposed approach, we conducted experiments using the H.263 encoder application. The obtained results demonstrated that EAD can effectively save energy in MP2SoC systems. They also showed that our MDE approach is capable of accelerating the DSE process to make early energy-efficient design decisions.

In this paper, we propose a 2D and 3D interconnect network based on a Mesh-of-Clusters (MoC) topology for the implementation of an efficient Field Programmable Gate Arrays (FPGA) architecture. Proposed MoC-based FPGA architecture presents a new hierarchical Switch Box (SBs) and depopulated intra-cluster interconnect based on the Butterfly-Fat-Tree (BFT) topology. Long routing wires which span multiple SBs in every row and column were used in order to improve performance. By adjusting the percentage of long wire and span, we can design and build 3D high density MoC-based FPGA. To design 3D MoC-based FPGAs, we cut the 2D FPGA into two equal FPGA dies and we adjust the long wire span factor to connect the two dies. Then, these long wire segments are converted as 3D through silicon via (TSV). We present also a design methodology and CAD tools to explore the performance of proposed 2D and 3D MoC-based FPGA architectures in term of power, energy, area and delay. Experimental results with large benchmarks show that with 3D MoC-based FPGA the average gains in terms frequency, energy and area are 23%, 37% and 47% respectively, compared to 2D MoC-based FPGA.

Parallel communication plays a critical role in massively parallel systems, especially in distributed memory systems executing parallel programs on shared data. Therefore, integrating an interconnection network in these systems becomes essential to ensure data inter-nodes exchange. Choose the most effective communication structure must meet certain criteria: speed, size and power consumption. Indeed, the communication phase should be as fast as possible to avoid compromising parallel computing, using small and low power consumption modules to facilitate the interconnection network extensibility in a scalable system. To meet these criteria and based on a module reuse methodology, we chose to integrate a reconfigurable SCAC-Net interconnection network to communicate data in SCAC Massively parallel SoC. This paper presents the detailed hardware implementation and discusses the performance evaluation of the proposed reconfigurable SCAC-Net network.

Energy saving strategies pose challenges for wireless Sensor Networks communication, as the nodes have limited energy resources and are battery powered. Thus, there is a strong interest in developing energy efficient transmission techniques. In this paper, we present a new approach to minimize the energy consumption of clustered wireless sensor networks, while achieving the required level of reliability. We consider clusters where sensors transmit monitored data to nearby cluster-head using cooperative communication. The goal of our approach is to minimize the transmit power energy based on Bit Error Probability (BEP) criterion for selective digital relaying (SDR) schemes whose closed form expression was recently derived in previous works. Therefore, the proposed scheme can efficiently allocate the least transmission power among the source and the relays that satisfy the predefined level of reliability while decreasing the energy consumption of the node. Simulation results show that our relay selection algorithm achieves significant energy savings (more than 50% compared with direct transmissions for moderate SNR values and up to 90% in high SNR regions).

This paper presents an automatic VHDL code generation method based on the OpenMP parallel programming specification. In order to synthesize C code for loops into hardware, we applied the directives of OpenMP, which specifies portable implementations of shared memory parallel programs. The proposed design flow using this method is described and its implementation details are provided. Experimental results show that the generated vhdl code from OpenMP is competitive with optimized code.

Recently, using Wireless Sensors Networks has increased rapidly in different domains. This advance has provides many solutions in several everyday life fields. Nevertheless, many problems of security and especially energy consumption have emerged. Due to this reasons many works propose solutions to increase the level of security and especially secure group communications. The communication requires common group key for protection of control messages and data reports. The group key should be updated when a node is compromised or a node leaves the group or a new node joins the group to achieve forward and backward security. It is in this context that our works was oriented to propose a new authentication scheme to improve the rekeying message authentication. Experimental results using real platform TelosB motes with tinyos operating system validate the efficiency of our proposed solution.

As the speed metric of Massively Parallel Multi-Processors System-on-Chip (MP2SoC) systems has increased over time, another metric has become more important: power consumption. Finding a tradeoff between power consumption and performance early in the design flow of MP2SoC systems in order to satisfy time-to-market is the design challenge of Electronic Design Automation (EDA) tools. This paper presents a Design Space Exploration (DSE) framework, named Energy-Aware Rapid Design of MP2SoC (EWARDS), aiming at exploring the performance and power capabilities of modern homogenous MP2SoC systems at design time using Model-Driven Engineering (MDE) techniques. The proposed framework extends the Modeling and Analysis of Real-Time and Embedded systems (MARTE)profile with power aspects of MP2SoC systems providing a high-level design entry. In addition, EWARDS integrates an energy-aware scheduler that strives to balance performance and energy savings by combining clustering scheduling algorithm with off-line Dynamic Voltage and Frequency Scaling (DVFS) power management techniques.

Security and privacy are challenging task in resource constrained in Internet of things (IoT) and Wireless Sensor Networks (WSN). Hence, anonymity and trust are prominent for many common IoT and WSN applications, in which we conceal nodes identity and give confidential data to a trusted node. The majority of exiting IoT security solutions cannot achieve complete security needs and/or have large computation overheads. In this paper we design a secure generic model for IoT and WSN to ensure anonymity, data secrecy and trust between nodes. Our work is based on lightweight key agreement protocol, the Identity Based Encryption (IBE) and Pseudonym Based Encryption (PBC).

In this paper, we propose an Extended-LEACH protocol that integrates an efficient multi-hop routing scheme in distributed clustering algorithms. In addition to energy saving, Extended-LEACH solves the issue of isolated cluster head nodes. The latter appear especially when distributed clustering protocols are deployed in wide wireless sensor networks. In contrast to some earlier work, Extended-LEACH allows both cluster head and non-cluster head nodes to appear in multi-hop routing paths. Such a choice enhances the network connectivity and improves the delivery of aggregated data packets. Extended experimentations and simulations are used to position and ascertain the performance of our proposed Extended-LEACH protocol against relevant earlier work. Results clearly show that Extended-LEACH provides a higher packet delivery ratio compared to both LEACH and MH-LEACH, yet it incurs much less signaling overhead than MH-LEACH.

Wireless sensor networks (WSNs) are important platforms for collecting environmental data and monitoring phenomena. So, outlier detection process is a necessary step in building sensor network systems to assure data quality for perfect decision making. Over the last few years Kernel Principal Component Analysis (KPCA) is considered as a natural nonlinear generalization of PCA, which extracts nonlinear structure from the data. Wireless sensor networks had been deployed in the real world to collect large amounts of raw sensed data. Then, the key challenge is to extract high level knowledge from such raw data. So, the accuracy of sensor readings is without a doubt one of the most important measures to evaluate the quality of a sensor and its network. For this case, the task amounts to create a useful model based on KPCA to recognize data as normal or outliers. However, KPCA based reconstruction error (RE) has found several applications in outlier detection but is not perfect to detect outlier. Within this setting, we propose Kernel Principal Component Analysis based Mahalanobis kernel as a new outlier detection method using mahalanobis distance to implicitly calculate the mapping of the data points in the feature space so that we can separate outlier points from normal pattern of data distribution. The use of KPCA based mahalanobis kernel on real word data obtained from three real datasets are reported showing that the proposed method performs better in finding outliers in wireless sensor networks when compared to the original RE based variant and the One-Class SVM detection approach.

Web service composition has been extensively studied in recent years. Although a lot of new models and mechanisms have been proposed, many issues in service composition still remain unsolved. Among them, forensics examination is one of the major concerns. As opposed to traditional forensics implementations, applying forensics to Web service infrastructures introduces novel problems such as the need for neutrality, comprehensiveness, and reliability. Existing approaches fail to recognize that even optimized strategies for service selection and composition involve the exchange of large amounts of potentially sensitive data, causing potentially serious forensics leaks. Consequently, forensics is still among the key challenges that keep hampering service composition-based solutions.

Web service composition has been extensively studied in recent years. Although a lot of new models and mechanisms have been proposed, many issues in service composition still remain unsolved. Among them, privacy is one of the major concerns. Indeed, inheriting characteristics of Web services environments such as high dynamism and untrustworthiness often generate conflicting privacy specifications with respect to the data exchanged within a composition. Even existing technologies for managing and applying data privacy policies are unsuccessful when dealing with this kind of applications as they involve autonomous entities and continuously exchange huge amount of heterogeneous information. This made urgent to have in place effective technologies for data privacy management in service compositions. These technologies should (1) deal with the flexibility, scalability, and heterogeneity in the overall infrastructure in which data are exchanged; and (2) integrate privacy concerns into the development process of these compositions. In this context, this paper tackles the problem of modeling, managing and preserving privacy in Web service composition processes. More specifically, we propose a first step towards providing a privacy preserving Web service composition approach that enables to (i) model and specify privacy policies, preferences, and requirements both at the client and at the provider sides, (ii) enforce the privacy model and build privacy aware compositions, (iii) verify the compliance between users privacy requirements and providers privacy policies, (iv) rank the composite Web services with respect to the privacy level they offer, and (v) provide privacy aware recovery actions to deal with incompatibilities.

Owing to the complexity of photovoltaic systems and their specific behavior, researchers are substantially prompted by the FPGA circuit for prototyping and testing photovoltaic system. In addition, to improve the efficiency of the photovoltaic system, Maximum Power Point Tracking (MPPT) is an essential technique that enables photovoltaic panel delivers its maximum output power. Fuzzy logic technique seems to be an efficient solution that ensures optimal operation of photovoltaic system. For this end, this work aim to implement a fuzzy logic MPPT technique on FPGA circuit to control a photovoltaic system. The system composed of photovoltaic panel, boost converter and the fuzzy logic controller using FPGA device to control boost converter switch is designed and implemented. Simulation results exhibit an efficient operation of FPGA based photovoltaic system.

Recently, using Wireless Sensor Networks (WSNs) is increasing in many areas, whether scientific, logistic, military, health and water monitoring. Water is among the vital material transported by pipeline systems. Any leakage in the pipe can cause major financial losses and possible environmental damages. Therefore, it is necessary to have a real time leak detection system. WSNs can play an important role to effectively detect the leak and minimize the water loss. Sensor size, however, is a significant limitation in terms of energy autonomy. In fact, the battery is very small and in general, it is not replaceable or rechargeable. Therefore, many studies are currently focusing on the management of the energy consumed by sensor nodes. In this paper, we propose a new energy efficient scheme for leak detection in water pipeline based on WSNs. The main goal of our proposal is to solve the problem of losing water and ameliorate network lifetime by reducing energy needs. The proposed scheme is composed of three tasks: deployment of sensors, routing and replacement of failed nodes. Simulations results validate the choice of the best cluster based routing protocol which will be executed in the second task of the proposed scheme.

The emergency of embedded systems puts new challenges for the design of different system in many fields. One of the embedded application's fields is the medical one. The major difficulty is the embedded system's reduced energy and computational resources that must be carefully used to execute complex application often in unpredictable environments. In this paper, the used application is the detection of evoked potential with variable latency and multiple trials using consensus matching pursuit. Fitting to the noisy Evoked Potential (EP) signal persistent in all response, we use the Consensus version of the matching pursuit algorithm (CMP). EP is a resulted wave from a stimulus. The EP can be explained with a good quality of energy ratio factor (QR). If we use a noisy EP, we cannot reconstruct the original data because of the random atoms of CMP dictionary. We select the significant atoms to rebuild and EP signals. This application is embedded on a Xilinx ML 507. We used an adaptive architecture based on dynamically partial reconfiguration.

In intelligent video surveillance systems, tracking people in non overlapping camera networks is a major challenge. To deal with the change of illumination, occlusion, change of view, etc., it is essential to seek the most robust object descriptor invariant during changes. By exploiting the performance of covariance descriptor, we propose a spatio-temporal covariance descriptor. This descriptor deals not only one picture as the majority of descriptors, but also considers groups of pictures to implicitly encode the described object motion by the integration of time parameter. The experiments conducted on “CAVIAR4REID” database showed these improvements. The person recognition rate in the first rank is improved by more than 10% compared to other descriptors.

Automatic Custom Architecture Generator (ACAgen) is a C-to-Hardware toolset that aims to facilitate and automate the design and development of complex and heterogeneous embedded systems. Framework and algorithms to analyze the initial C code to be exploited in the hardware generation process are needed. Indeed, in the process of Custom Instruction integration within reconfigurable SoC, the initial application C code needs to be automatically updated with the custom instruction opcode. This paper presents the design, and development of an ACAgen Java library able to read, manipulate, and write C code. Its implementation is based on C parsing approach making the SoC design fast and easy. In order to evaluate the usefulness of our ACAgen Java library, we conducted a 3D case study where we applied the new tool to source code of Scalar, Znormal, Projection and other applications. As a result, ACAgen has been able to effectively identify the characteristics of the initial application C code to update it with the hardware components.

Classifying Web services into functionally similar groups is an efficient way to enhance services discovery, composition, and substitution processes. In order to ensure such efficiency, the classification process should rely on adequate semantic similarity measures. This paper presents a practical approach to measure the similarity of Web services. Both semantic and syntactic descriptions are integrated through specific techniques for computing similarity measures between services. Formal Concept Analysis (FCA) is used then to classify Web services into concept lattices in order to facilitate relevant services identification for composition and/or substitution purposes. The proposed similarity measure is evaluated and compared to some of the best-known existing ones. Results show a significant improvement of precision and recall of relevant services discovery for further composition and substitution tasks.

Abstract In the context of wireless sensor networks (WSNs), the ability to detect an intrusion event is the most desired characteristic. Due to the randomness in nodes scheduling algorithm and sensor deployment, probabilistic techniques are used to analyze the detection properties of WSNs. However traditional probabilistic analysis techniques, such as simulation and model checking, do not ensure accurate results, which is a severe limitation considering the mission-critical nature of most of the WSNs. In this paper, we overcome these limitations by using higher-order-logic theorem proving to formally analyze the detection properties of randomly-deployed WSNs using the randomized scheduling of nodes. Based on the probability theory, available in the HOL theorem prover, we first formally reason about the intrusion period of any occurring event. This characteristic is then built upon to develop the fundamental formalizations of the key detection metrics: the detection probability and the detection delay. For illustration purposes, we formally analyze the detection performance of a WSN deployed for border security monitoring.

Modern FPGA allows the design of very complex System-on-Chips (SoC). To fulfil modern application requirements, in terms of performance/energy consumption ratio, Heterogeneous Multiprocessor System-on-Chip (Ht- MPSoC) architectures represent a promising solution. In such systems, the processor instruction set is enhanced by application-specific custom instructions implemented on reconfigurable fabrics, namely FPGA. To increase area utilization and guarantee application constraint respect, we propose a new Ht-MPSoC architecture where hardware accelerators (HW accelerators) are shared among different processors in an intelligent manner. In this paper, we extend existing Ht-MPSoC architectures by considering asymmetric (AHt-MPSoC). In these architectures, cores have different resources that may share in different manners. Depending on the running applications and their needs in processing, private and shared HW accelerators are attached to the different cores. On a 8-core AHt-MPSoC we obtained a speed of 2.6 with a reduced number of HW accelerators for our benchmarks.

Heterogeneous Multiprocessor System-on-Chip (Ht-MPSoC) architectures represent a promising approach as they allow a higher performance/energy consumption trade-off. In such systems, the processor instruction set is enhanced by application-specific custom instructions implemented on reconfigurable fabrics, namely FPGA. To increase area utilization and guarantee application constraint respect, we propose a new architecture where Ht-MPSoC hardware accelerators are shared among different processors in an intelligent manner. In this paper, a Mixed Integer Linear Programming (MILP) model is proposed to systematically explore the complex design space of the different configurations.

This paper presents a hardware implementation of morphological operations based on dynamic and partial reconfiguration (DPR) technique. This technique allows reconfiguring a part of the FPGA area with different functionalities at runtime. It is a promising solution toincrease performance in the system. Our design allows todesigner to choose the adequate morphological operation (erosion or dilation) according the image constraints. We use xilinx tools and Virtex-5 FPGA board. To evaluate our implementation, we measure the performance in terms of area occupation and time reconfiguration. The results show the implementation of morphological operations on FPGA (Field Programmable Gate Array) using DPR can improve the performance and saving at least 11% of area.

Scaling the applications output quality in order to meet constraints and keep preserving NFPs is an important adaptation technique in modern embedded systems. In this paper, we propose a model driven framework for the modeling, NFPs verification and application reconfiguration of multitask networked RTE systems. We use the UML standard and an extension of the MARTE profile for the system high level specification. Then we profit from the MDE capabilities to map system models to a verification and reconfiguration platform. We illustrate the effectiveness of our approach using a RTE system running CPU and network bandwidth intensive multimedia applications.

Low power and lossy networks (LLNs) require efficient routing protocols that should meet the requirements of the critical applications, such as real-time, reliability and high availability. RPL has been recently proposed by the ROLL working group as a tree routing protocol specifically designed for LLNs. It relies on objective functions to construct routes that optimize or constrain a routing metric on the paths. However, the working group did not specify the set of metrics and/or constraints to be used to specify the preferred path, and left it open to implementations. In this paper, we design OF-FL, a novel objective function that combines a set of metrics in order to provide a configurable routing decision based on the fuzzy parameters. OF-FL has the advantage to consider the application requirements in order to select the best paths to the destination. Our evaluation with a large-scale testbed in ContikiOS reveals that OF-FL can achieve remarkable performance of the RPL-based LLNs in comparison with the existing objective functions, and appropriately satisfy the quality of service contract of the different applications.

The performance of massively parallel processing system depends mostly on the control configuration that is inherently part of the system. In particular, centralized control configuration is rigid and limits system scalability, and distributed control configuration is difficult to control in processing elements (PEs) interaction. Maintaining a flexible autonomous computation coupled with regular synchronous communication can assure a efficient parallel processing. The master-slave control structure is specified in such a way that previous features of the massively parallel System-on-Chip (mpSoC) are preserved and performance is improved. In this paper, we define the prototyping of a master-slave control structure for mpSoC in a FPGA-based platform. The structure implementation and related experiments using the vhdl language running on virtex6 ml605 of Xilinx board are described.

Web services provide an instantiation of the loosely coupled Service Oriented Architecture (SOA) and facilitate the process of enterprise application integration. However, with the explosive growth of the number of Web services published over the Internet, identifying a high quality of composite services by taking into account both functional and non-functional requirements of end users has become a real challenge that needs to be addressed. We propose in this paper an approach that adresses this challenge by considering a two-phase composition process. The composition first proceeds to generate an abstract plan based on Web service types using Dynamic Description Logics (DDL). This abstract plan is then concretized into an executable plan by selecting the appropriate Web service instances based on non-functional requirements.

The presented work proposes a MARTE (Modeling and Analysis of Real-Time and Embedded systems) extension for the specification of data-parallel applications designed to be executed on mppSoC, a massively parallel System-on-Chip. These applications can be clearly specified and generated using our transformation chain, which is automated and is a combination of contributions in different domains such as Model-Driven Engineering, MARTE modeling and automatic code generation. The modeling methodology as well as the generation process are validated by an image processing application example.

Data process algorithms are increasing in complexity especially for image and video coding. Therefore, hardware development using directly hardware description languages (HDL) such as VHDL or Verilog is a difficult task. Current research axes in this context are introducing new methodologies to automate the generation of such descriptions. In our work we adopted a high level and target-independent language called CAL (Caltrop Actor Language). This language is associated with a set of tools to easily design dataflow applications and also a hardware compiler to automatically generate the implementation. Before the modifications presented in this paper, the existing CAL hardware back-end did not support some high-level features of the CAL language. Consequently, high-level designed actors had to be manually transformed to be synthesizable. In this paper, we introduce a general automatic transformation of CAL descriptions to make these structures compliant and synthesizable. This transformation analyses the CAL code, detects the target features and makes the required changes to obtain synthesizable code while keeping the same application behavior. This work resolves the main bottleneck of the hardware generation flow from CAL designs.

Real-Time Systems are subject to Soft/Hard temporal constraints. Besides, a tasks scheduling step is required to meet the maximum of deadlines, for which there are different scheduling algorithms to do. However, nowadays real-time systems represent a serious issue for the worldwide industry due to their growing complexity. Indeed, since they are more susceptible to failures and deficiencies of development, it is crucial to rely on high level development methods. In this context, some researchers have proposed scheduling analysis within the new profile Modeling and Analysis of Real-Time and Embedded systems (MARTE), which supports both monoprocessor and multiprocessor scheduling algorithms. While supported multiprocessor scheduling algorithms are part of the partitioned approach, global approach algorithms have not been backed by MARTE yet. In the present paper, we seek to improve the meta-models of MARTE stereotypes to establish scheduling analysis for the global approach.

The power consumption is one of the most important preoccupations of the chip designers. However, reducing power consumption has its negative impact on the circuit. For example, reducing the supply voltage of a microprocessor implies an increase in the probability of process-variation-induced failures. Fault tolerant architectures propose a trade-off by boosting the reliability while reducing power consumption. Since a large part of the microprocessor power is consumed by the cache memory, we propose in this paper the Parity-based mono-Copy Cache (PmC2) that maintains cache reliability under aggressive voltage scaling. PmC2results in reducing energy consumption considerably with very low performance penalty. PmC2uses a parity check mechanism in error detection and only one cache block redundancy for error correction. Our experimental results demonstrate that reducing the supply voltage with roughly 25% of nominal Vdd achieves more than 62% reduction in cache power consumption with a negligible IPC loss that does not exceed 0.15%.

Due to the large number of sensor manufacturers and differing accompanying protocols, integrating diverse sensors into observation systems is not straightforward. A coherent infrastructure is needed to treat sensors in an interoperable, platform-independent and uniform way. The concept of the Sensor Web reflects such a kind of infrastructure for automatically discovering and accessing appropriate information from heterogeneous sensor devices over the Internet. In this context, the Open Geospatial Consortium (OGC) established the Sensor Web Enablement (SWE) initiative that specifies standard interfaces and encodings to remotely access, encode and exchange the sensed data. However, SWE standards have several gaps that limitate its capabilities to achieve the sensor Web desires. In this paper, we address the problems related to the data format and the architectural style followed by the implementation of the SWE services. Indeed, we propose the adoption of the lightweight Representational State Transfer (REST) web services concept and the usage of JavaScript Object Notation (JSON) format as an alternative to the verbose XML one for the exchanged messages.

User authentication in classical networks is deeply addressed, but few results are related to Wireless Sensor Networks (WSNs). In addition, the proposed schemes do not provide mutual authentication or session-key agreement between the server and the user. Therefore, we present in this paper a lightweight user authentication scheme adapted to WSNs that provides mutual authentication and session-key agreement. The proposed scheme allows a user equipped with mobile device (typically PDA) to authenticate himself before gaining access to the WSN. The scheme is executed at two sides; the client side which controls the user's mobile device and the server side represented by the coordinator of the WSN. A security analysis of the scheme is presented and it proves its resilience against classical types of attacks. The scheme is also implemented on real platform of sensor nodes. This implementation proves that our scheme is lightweight and rapid as it requires approximately only 1s to be fully executed. In addition, we have made a comparison between our scheme and the existing ones based on their security properties, and shown that our proposed scheme outperforms the existing ones in terms of confidentiality, integrity, mutual authentication and session key generation with a lightweight computation overhead.

Unified Modeling Language (UML) extensions for real time embedded systems (RTES) co-design are taking a growing interest by a great number of industrial and research communities. The extension mechanism is provided by UML profiles for RTES and it aims at improving an easily-understood method of system design for non-experts. One of the key items of the co-design methods is the Hardware/Software partitioning and scheduling tasks. Indeed, it is mandatory to define where and when tasks are implemented and run. Unfortunately, the main goals of co-design are not included in the usual practice of UML profiles. So, there exists a need for mapping used models to an execution platform for both schedulability test and HW/SW partitioning. In the present work, test schedulability and design space exploration are performed at an early stage. The proposed approach adopts Model Driven Engineering MDE. It starts from UML specification annotated with the recent profile for the Modeling and Analysis of Real Time Embedded systems MARTE. Following refinement strategy, transformation rules allow the finding of a feasible schedule that satisfies timing constraints and defining where tasks will be implemented. The overall approach is experimented on the design of a football player robot application.

We propose in this paper an approach for document clustering. It consists on representing the corpus as a document graph, where links are defined by some criteria. These links are quantified by similarity measures. We aim to join this context with clustering to build small-world networks of homogeneous documents. The homogeneity of the clusters is measured according to the properties of small-worlds networks. The clusters, as well as their properties, allow to re-rank search results. Some experiments have been undertaken into a corpus provided by TREC and the obtained results show the contribution of small-worlds properties and analysis in information retrieval and document re-ranking.

Significant advances in the field of configurable computing have enabled parallel processing within a single Field-Programmable Gate Array (FPGA) chip. This paper presents the implementation of a flexible and programmable Single Instruction Multiple Data (SIMD) processing system on FPGA that can be adapted to the application. Its implementation is based on an IP (Intellectual Property) assembling approach making its design fast and easy. A generation tool is also developed to generate the SIMD configuration depending on the application requirements. The proposed parallel processing system on chip is portable, scalable and flexible since it can be customized to match the needs of a data parallel application. Based on FPGA, different SIMD configurations have been evaluated in terms of performance and area trade-offs. The proposed parametric system shows good results executing some signal processing applications such as parallel matrices multiplication, FIR filter and RGB to YIQ image color conversion.

This paper provides a performance study for securing media streaming based on hash chain methodology. We introduce a new technique that combines the signature of window-based hash chain with redundancy codes for achieving high reliability and robustness against many attacks. Also, the Window technique integrates the Time-Stamped which strongly eliminates the anti-replay attack. It will also control the management of many users accessing the same video in different instant times. The Window-Based algorithm with redundancy code will be compared against Packet-Based or just Block-Based video streaming security. The analytical and simulation results indicate that, the Window-Based Hash Chain Signature combine with Redundancy Code (WB & RC) is a good solution for video streaming security in terms of reliability and robustness. The times of signature creation and verification are accepted under the standard delay recommendations of real time applications. Our case study provides You Tube as a successful scenario over Internet. The privacy of You Tube will relay on a secure email in user access which represents an efficient way in mobility issue.

Single instruction multiple data processors are increasingly used in embedded systems for multimedia applications because of their area and energy-efficiency. Neighboring communications between the processing elements are a key issue in SIMD processors. They are present in most data parallel applications. However, the lack of flexibility in major parallel architectures is its main shortcoming. In order to improve the performances of a massively parallel architecture, especially in term of neighboring communication we need a flexible and parametric communication network. This paper focuses on the problems with the design of a parametric nearest neighborhood interconnection network in a SIMD architecture in system on chip (SoC). This network can be configured in multiple topologies making it flexible and parametric in order to suit different application needs. The proposed architecture is evaluated in terms of area (cost) and performance (execution time), which are deduced respectively from synthesis and simulation results. Experiments are performed on different architectures with various topologies. In order to evaluate the performance of the proposed architecture, a FIR application is finally implemented.

In 2004, Das et al. proposed a ldquoDynamic ID-based Remote User Authentication Scheme using Smart Cardsrdquo. This scheme have the advantage that users can choose and change their password freely and the server does not maintain any verifier table, which avoid the risk of stolen/modifying this table. However, in 2005, Liao et al. demonstrated that Das et al.'s scheme suffers from guessing attacks, unilateral authentication and revealing of user password and propose improvements to prevent these shortcomings. However, in this paper, we demonstrate that Liao et al.'s scheme is not secure and it is vulnerable to stolen/lost smart card attack, impersonation (forgery) attack and password revealing attack. In fact, we prove that the scheme is equivalent to no password scheme. Then, we propose possible improvements to Liao et al.'s scheme. We demonstrate through comparison between the three schemes that the proposed one is more secure while maintaining the same computational overhead as Das et al.'s scheme.

H.264/AVC (Advanced Video Codec) is a new video coding standard developed by a joint effort of the ITU-TVCEG and ISO/IEC MPEG. This standard provides higher coding efficiency relative to former standards at the expense of higher computational requirements. Implementing the H.264 video encoder for an embedded System-on-Chip (SoC) is a big challenge. For an efficient implementation, we motivate the use of multiprocessor platforms for the execution of a parallel model of the encoder. In this paper, we propose a high-level independent target-architecture parallelization methodology for the development of an optimized parallel model of a H.264/AVC encoder. This methodology is used independently of the architectural issues of any target platform. It is based on the exploration of the task and data levels forms of parallelism simultaneously, and the use of the parallel Kahn Process Network (KPN) model of computation and the YAPI programming C++ runtime library. The encoding performances of the obtained parallel model have been evaluated by system-level simulations targeting multiple multiprocessors platforms.

H.264/AVC (advanced video codec) is a new video coding standard developed by a joint effort of the ITU-TVCEG and ISO/IEC MPEG. This standard provides higher coding efficiency relative to former standards at the expense of higher computational requirements. Implementing the H.264 video encoder for an embedded system-on-chip (SoC) is a big challenge. For an efficient implementation, we motivate the use of multiprocessor platforms for the execution of a parallel model of the encoder. In this paper, we propose a high-level independent target-architecture parallelization methodology for the development of an optimized parallel model of a H.264/AVC encoder (i.e. a processes network model balanced in communication and computation workload).

In Multi-Processor System-on-Chip (MPSoC) architectures equipped with shared-memory, caches have significant impact on performance and energy consumption. Indeed, if the executed application depicts a high degree of reference locality, caches may reduce the amount of shared-memory accesses and data transfers on the interconnection network. Hence, execution time and energy consumption can be greatly optimized. However, caches in MPSoC architectures put forward the data coherency problem. In this context, most of the existing solutions are based either on data invalidation or data update protocols. These protocols do not consider the change in the application behavior. This paper presents a new hybrid cache-coherency protocol that is able to dynamically adapt its functioning mode according to the application needs. An original architecture which facilitates this protocol's implementation in Network-On-Chip based MPSoC architectures is also proposed. Performances, in terms of speed up factor and energy reduction gain of the proposed protocol, have been evaluated using a Cycle Accurate Bit Accurate (CABA) simulation platform. Experimental results in comparison with other existing solutions show that this protocol may give significant reductions in execution time and energy consumption can be achieved.

The increasing popularity of nomad multimedia systems put new challenges for their design: increasing functionalities, limited energy and computation resources. These systems must provide a maximum application quality of service (QoS) in the presence of a dynamically varying environment (e.g. video streaming and multimedia conferencing) and multiple resources constraints. To respond to the changing resource availability and application demands, a new class of adaptation method is emerged. It combines the adaptation simultaneously upon the different layers related to the target system: hardware, application and OS. This paper presents an overview of a multilayer. The global manager (GM) is uses to handle large and long-term variations whereas the local manager (LM) is used to guarantee the real time constraint. This paper focuses on the LM that intervenes only in the application layer and OS layer.

International audience

Since 2006, many countries, all over the world, begin to issue e-passports containing biometric data for their citizens. The International Civil Aviation Organization (ICAO) specification for cryptography in e-passport is proven to be insecure and has many threats. The European Union (EU) has defined an extended access control (EAC) mechanism for e-passports. But, even this solution presents many threats especially in security and privacy. In this paper, we present a new method for securing the exchange between an e-passport and the inspection system IS. We propose an on-line authentication mechanism based on elliptic curve Diffie-Hellman key agreement protocol. We create elliptic curve based on biometric data to validate the identity of the user. Our proposal uses a shorter key than others solutions.

The design of modern multiprocessor systems-on-chip has performance constraints which must be satisfied by the interconnection architecture. multistage interconnection networks, also denoted MINs, seem to be a promising alternative for solving the problems of on-chip communications. This paper presents a formal specification of the Delta multistage interconnection networks for MPSoCs in the ACL2 logic. This work is based on a generic model for networks on chip (GeNoC).

Wireless sensor networks (WSN) are the subject of widespread deployment in commercial and military environments that call for security. Since sensor networks pose unique challenges, traditional security techniques used in traditional networks cannot be directly applied. A previous work defines TinySec, a link layer security protocol for TinyOS to provide integrity and confidentiality of messages for WSN. However, TinySec employs a simple group key management where a single shared key is stored in each sensornode. This makes the network unsecured and vulnerable to attacks. Therefore, TinySec must be enhanced with a more robust key management scheme. This paper presents the integration of a proposed key management scheme as a more robust key management solution for TinyOS. The more secured TinyOS is evaluated in terms of key computation time, memory, and energy consumption overhead. Experimental results demonstrate that the secure key management protocol introduces negligible overhead and does not affect the system performance. We also present performances comparison with two well known key distribution protocols, implemented specially for sensor networks namely, ECDLP and LEAP.

We present a new HW/SW partitioning approach. This partitioning method is called an online partitioning algorithm (O.P.A) which consists to adapt dynamically the architecture to the processing requirements. A scheduling heuristic is associated to this partitioning approach. We compare our method with an off-line static HW/SW partitioning approach.

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A cascaded pipelined recurrent neural network/NLMS structure is employed in an attempt to model the room/speakerphone transfer function and acoustic path in a hands-free environment. To investigate the feasibility of practical hardware implementation of the proposed structure, this paper aims at implementing the pipelined recurrent neural network and NLMS algorithms by using VHDL. VHDL is the name of the IEEE 1076 Hardware Description Language standard for very high-speed digital circuits design. Galileo, an RTL/logic synthesis tool, has been used in order to generate the gate level of the proposed structure. The Xilinx family is chosen as target technology.

This paper presents a method for modeling and synthesizing mixed HW/SW systems. The proposed method starts from a full system-level specification. Systems are modeled in a synthesis-oriented manner by means of an extended finite state machine model. System-level synthesis is composed of three tasks: partitioning systems into inter-dependent sub-systems, inter-subsystem communication synthesis and architecture mapping onto a flexible architecture platform which includes both hardware and software components. The overall method is illustrated with an example.>