Demo Data from EDBT 2026 / reviewers in the wild / expert
Eugen I. Muehldorf
dblp:71/4047
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 1982
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test
design for testability |
0.0 | 1 | 1981 | LSI Logic Testing - An Overview · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test
fault modeling |
0.0 | 1 | 1981 | LSI Logic Testing - An Overview · IEEE Trans. Computers 1981 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1981 | LSI Logic Testing - An Overview · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test › VLSI testing
logic testing |
0.0 | 1 | 1981 | LSI Logic Testing - An Overview · IEEE Trans. Computers 1981 |
Methods — techniques the papers use, named apart from their topics
test pattern generation · 0.0fault simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1982 | Analysis of the Switching Behavior of Combinatorial Logic Networks
Eugen I. Muehldorf, Thomas W. Williams |
ITC | 1 |
| 1981 | LSI Logic Testing - An OverviewabstractThe development of large scale integration (LSI) testing is reviewed. The paper concentrates on the testing of logic components and presents in-depth discussions of the methods of fault modeling, test pattern generation, fault simulation, and design for testability. It is shown how these methods are used in the design of components and how they can be used in support of design automation. Finally, a brief account of test equipment and test data preparation is given. Eugen I. Muehldorf, Anil D. Savkar |
IEEE Trans. Computers | 1 |