Demo Data from EDBT 2026 / reviewers in the wild / expert
Maurizio Paolini
dblp:71/4841
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2009
0000-0001-9703-5813ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Graphics, computer vision, multimedia, augmented reality and games · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 1 heaviest of 1, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › system-level design
hardware design reuse |
0.0 | 1 | 1999 | FPGA Design Experiences Using the CSELT VIP (TM) Library · FPGA 1999 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2009 | Completion of Visible ContoursabstractWe show that the completion problem of reconstructing the hidden arcs of the contours of an image, given only the visible ones, has a solution. More precisely we prove that, given an oriented plane graph K having as vertices only T-junctions and nonexterior terminal points, there exists an apparent contour G such that K is the visible part of G. This result is sharp, since the converse statement is easily seen to be satisfied. As a consequence, from K we can reconstruct a solid shape E in three-dimensional space such that K coincides with the visible part of the apparent contour of E. The main tools used to prove our result are a Morse description of K and the Huffman labelling for apparent contours. Giovanni Bellettini, Valentina Beorchia, Maurizio Paolini |
SIAM J. Imaging Sci. | 3 |
| 1999 | FPGA Design Experiences Using the CSELT VIP (TM) LibraryabstractNo abstract available. Enrica Filippi, Archille Montanaro, Maurizio Paolini, Maura Turolla |
FPGA | 3 |