Demo Data from EDBT 2026 / reviewers in the wild / expert
Rohit Dhiman
dblp:72/10856
· DBLP profile ↗
3ranked-venue papers
0as first author
2since 2021 · last 2025
0000-0001-9059-5885ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 since 2021Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 67% Integrated circuit design · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
3d integration |
0.9 | 1 | 2025 | Sampling-Biorthogonal Time-Domain Technique for Temperature-Dependent Transient Analysis of Coaxial-TGVs in 3-D Integration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025 |
Electronic design automation › signal integrity
crosstalk analysis |
0.9 | 1 | 2025 | Sampling-Biorthogonal Time-Domain Technique for Temperature-Dependent Transient Analysis of Coaxial-TGVs in 3-D Integration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025 |
Electronic design automation
signal integrity |
0.9 | 1 | 2025 | Sampling-Biorthogonal Time-Domain Technique for Temperature-Dependent Transient Analysis of Coaxial-TGVs in 3-D Integration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025 |
Methods — techniques the papers use, named apart from their topics
transmission line modeling · 0.9sampling-biorthogonal time-domain technique · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Sampling-Biorthogonal Time-Domain Technique for Temperature-Dependent Transient Analysis of Coaxial-TGVs in 3-D IntegrationabstractA novel sampling-biorthogonal time-domain (SBTD) technique by considering the positive sampling basis and biorthogonal dual testing functions is developed to accurately model temperature-dependent crosstalk effects in circular and square coaxial-through glass vias (C-TGVs). An equivalent transmission-line model employing EM theory-based Bessel and Neumann functions to establish closed-form formulae for the frequency- and temperature-dependent resistance, inductance, capacitance, and conductance (per-unit-height) of both C-TGV configurations is presented. The efficacy of proposed SBTD technique is verified with SPICE results and conventional finite-difference time-domain (FDTD) technique. The SBTD technique proves more efficient with respect to FDTD, exhibiting less than 0.7% average error in estimating dynamic crosstalk-induced delay with lesser computational effort. Therefore, it is very useful for addressing the issues of electromagnetic interference and electromagnetic compatibility in 3-D integration. K. Madhu Kiran, Rohit Dhiman |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2021 | Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects
Rajeevan Chandel, Rohit Dhiman |
Integr. | 3 |
| 2019 | Design and Performance Analysis of SiGe Hetero Nanotube Junctionless FETabstractIn this paper, a SiGe source-drain n-type hetero nanotube (HNT) junctionless field effect transistor (JLFET)is proposed with its enhanced performance for the sub-20 nm regime. We demonstrate that the hetero interface at source-channel-drain generates the valence band discontinuity in HNT JLFET which diminishes the effect of lateral band to band tunneling (L-BTBT) of electrons in OFF-state. Further, high- κ spacers improves the dynamic performance in terms of high ION/IOFF ratio of ~1011even for 5 nm gate length. The inclusion of core gate although increases the OFF-state current in nanotube junctionless field effect transistor (NT JLFET) however, in HNT JLFET OFF-state current is decreased followed by DIBL and sub-threshold slope of 4 mV /V and of 61.2 mV/decade, respectively. Moreover, implications of using the HNT JLFET in analog/RF applications has been demonstrated with numerically simulated results of Synopsys Sentaurus TCAD showing a remarkable gain-bandwidth product of 3.91 THz and an intrinsic gain of 32.77 dB. Anchal Thakur, Rohit Dhiman |
TENCON | 2 |