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Ronald J. Cosentino

dblp:72/1216 · DBLP profile ↗
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5ranked-venue papers
5as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-authorComputer networks · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Hardware reliability and fault tolerance · 31% Integrated circuit design · 28% Processor architecture and microarchitecture · 18%
Computer graphics and multimedia
2 papers
Audio and music processing · 82% Multimedia systems and quality of experience · 18%
Network and information security
1 paper
Cryptographic primitives and cryptanalysis · 100%

Topics — the 10 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › digital arithmetic circuits
complex multiplication
0.011992
Adaptation of the Mactaggart and Jack Complex Multiplication Algorithm for Floating-Point Operators · IEEE Trans. Computers 1992
Processor architecture and microarchitecture
computer arithmetic
0.011992
Adaptation of the Mactaggart and Jack Complex Multiplication Algorithm for Floating-Point Operators · IEEE Trans. Computers 1992
Hardware accelerators and domain-specific architectures
systolic array
0.021988
Fault tolerance in a systolic residue arithmetic processor array · IEEE Trans. Computers 1988
Concurrent error correction in systolic architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Hardware reliability and fault tolerance
error detection
0.011988
Concurrent error correction in systolic architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › hardware test
fault localization
0.011988
Concurrent error correction in systolic architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Hardware reliability and fault tolerance
redundancy
0.011988
Fault tolerance in a systolic residue arithmetic processor array · IEEE Trans. Computers 1988
Integrated circuit design
residue number system arithmetic
0.011988
Fault tolerance in a systolic residue arithmetic processor array · IEEE Trans. Computers 1988
Audio and music processing › time-frequency processing
spectral modification
0.011986
A Versatile Spectrum Modification Technique · IEEE J. Sel. Areas Commun. 1986
Cryptographic primitives and cryptanalysis
encryption
0.011984
An Efficient Technique for Sample-Masked Voice Transmission · IEEE J. Sel. Areas Commun. 1984
Multimedia systems and quality of experience
voice communication
0.011984
An Efficient Technique for Sample-Masked Voice Transmission · IEEE J. Sel. Areas Commun. 1984

Methods — techniques the papers use, named apart from their topics

mactaggart and jack algorithm · 0.0linear filtering · 0.0bandpass signal processing · 0.0systolic array · 0.0scan design · 0.0residue number system · 0.0hardware monitoring · 0.0interpolation · 0.0finite impulse response filter · 0.0decimation · 0.0
YearPublicationVenuePosition
1992 Adaptation of the Mactaggart and Jack Complex Multiplication Algorithm for Floating-Point Operators
abstract
With a suitable treatment of the exponents in the input operands, a hardware implementation of the Mactaggart and Jack fixed-point complex multiplication algorithm can also calculate a floating-point product with no loss in accuracy from the greater dynamic range of the floating-point inputs. This floating-point technique can be extended to any sum to two products operation, such as encountered in matrix multiplication and vector cross-products.>
Ronald J. Cosentino, John J. Vaccaro
IEEE Trans. Computers1
1988 Fault tolerance in a systolic residue arithmetic processor array
abstract
The regularity of systolic arrays and the potential for redundancy in residue number systems are used to provide fault tolerance in VLSI systems. The fault tolerance is concurrent with normal circuit operation and allows a continuous flow of correct data when a fault occurs. There is no interruption of valid data flow while the circuits are reconfigured. The technique also obviates the need for ultrahigh-reliability switches and switching control circuits. A fault-tolerant implementation of a finite-impulse-response filter with five residue channels, two of which are redundant, demonstrates the technique. As long as not more than one cell in each processing block is faulty, the filter outputs contain no errors.>
Ronald J. Cosentino
IEEE Trans. Computers1
1988 Concurrent error correction in systolic architectures
abstract
It is shown how two features of systolic arrays in which the cells retain partial results rather than pass them on can be used to facilitate testing and fault localization with no modification of the systolic design; the monitoring is performed either by software in the host processor or by hardware following the system output. One feature is the ability to enter identical sequences of inputs into two adjacent processor elements; the other is the resemblance of the data flow to that of a scan design. In particular, a one-dimensional systolic architecture of interest is described and applied to a finite-impulse response filter. Both the error detection and correction coverages are considered in detail for the FIR filter. The concurrent error-correction technique is applicable only to operational reliability, but the concurrent error-detection technique is equally applicable to manufacturing tests, incoming tests, and periodic maintenance tests. A hardware implementation of the error-detection-and-correction technique is presented. The architecture is extended to a two-dimensional processor.>
Ronald J. Cosentino
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1986 A Versatile Spectrum Modification Technique
abstract
The spectrum modification technique is a digital procedure for placing the spectrum of any band-limited signal-analog or digital within an arbitrarily chosen set of (nonoverlapping) frequency intervals, the sum of whose lengths is not less than the original bandwidth of the signal. Because it can serve the function of several digital techniques, such as mixing, interpolating, and decimating, and can he realized in a finite impulse response (FIR) filter form, it may be suitably implemented by a programmable FIR filter having a flexible timing scheme. The technique is more computationally efficient for many of its applications than the conventional algorithms it replaces. In the application for which it was developed, it replaced a mixer and the concomitant filtering required to shift a signal spectrum a fraction of its bandwidth and cut the computational rate an order of magnitude.
Ronald J. Cosentino, Stephen J. Meehan
IEEE J. Sel. Areas Commun.1
1984 An Efficient Technique for Sample-Masked Voice Transmission
abstract
Introduced here is a new technique for encrypting bandpass signals. The technique linearly filters a sample-masked signal, modifying the encryption component of the cryptogram to place its spectrum within the frequency band of the signal. Sample masking is a recognized means of encrypting baseband signals while containing the spectrum of the cryptogram within the signal bandwidth. A drawback occurs for bandpass signals, owing to the processing required in the mixing procedures used ordinarily to convert the signal from bandpass to baseband and back. In contrast, the linear filter modifies the encryption component of the cryptogram without processing the signal component, reducing the computational burden of encrypting and decrypting by an order of magnitude. When the maximum frequency is an integer multiple of the minimum frequency, the filter can output the same information symbols that appear at the input and replace the redundant symbols with symbols that control the passband of the output signal. For voice bandwidths of 300-3000 Hz sampled at 6000 Hz, redundancy symbols (one in every ten or 600 samples/s) are removed, the information symbols (nine in ten or 5400 samples/s) are encrypted, and the redundancy symbols are replaced by bandwidth-controlling symbols. Experimental results of clear voice transmitred over simulated telephone lines validate the technique.
Ronald J. Cosentino, Stephen J. Meehan
IEEE J. Sel. Areas Commun.1