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Zosimo Arevalo

dblp:72/1328 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1978
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › logic synthesis › logic minimization
boolean function minimization
0.011978
A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays · IEEE Trans. Computers 1978
Electronic design automation
logic synthesis
0.011978
A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays · IEEE Trans. Computers 1978
Electronic design automation › logic synthesis
programmable logic array
0.011978
A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays · IEEE Trans. Computers 1978
YearPublicationVenuePosition
1978 A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays
abstract
This paper describes an algorithm for minimizing an arbitrary Boolean function. The approach differs from most previous procedures in which first all prime implicants are found and then a minimal set is then determined. This procedure imposes a set of conditions on the selection of the next prime implicant in order to obtain a near minimal sum-of-products realization. Extension to the multiple output and incompletely specified function cases is given. An important characteristic of the proposed procedure is the relatively small amount of computer time spent to solve a problem, as compared to other procedures. The MINI algorithm may give better results for a large number of inputs and outputs if relatively few product terms are needed. This procedure is also well suited to find a solution for programmable logic arrays (PLA's) which internally implement large Boolean functions as a sum-of-products.
Zosimo Arevalo, Jon G. Bredeson
IEEE Trans. Computers1