Demo Data from EDBT 2026 / reviewers in the wild / expert
Noé Lopez-Benitez
dblp:72/1882
· DBLP profile ↗
9ranked-venue papers
4as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 3 · 1 first-authorSystems, architecture and hardware · 2 · 1 first-authorSecurity and privacy · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-authorDatabases, data management, data science and information retrieval · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Performance modeling and evaluation · 47% Hardware reliability and fault tolerance · 30% Distributed systems · 13% |
Topics — the 9 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation
dependability modeling |
0.0 | 1 | 1994 | Dependability Modeling and Analysis of Distributed Programs · IEEE Trans. Software Eng. 1994 |
Distributed systems
fault tolerance |
0.0 | 1 | 1994 | Dependability Modeling and Analysis of Distributed Programs · IEEE Trans. Software Eng. 1994 |
Hardware reliability and fault tolerance › fault-tolerant architecture
fault-tolerant processor arrays |
0.0 | 1 | 1992 | Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays · IEEE Trans. Computers 1992 |
Hardware reliability and fault tolerance
reconfiguration |
0.0 | 1 | 1992 | Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays · IEEE Trans. Computers 1992 |
Hardware reliability and fault tolerance
reliability analysis |
0.0 | 1 | 1992 | Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays · IEEE Trans. Computers 1992 |
Performance modeling and evaluation
stochastic modeling |
0.0 | 1 | 1992 | Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays · IEEE Trans. Computers 1992 |
Performance modeling and evaluation
stochastic petri nets |
0.0 | 1 | 1992 | Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays · IEEE Trans. Computers 1992 |
Processor architecture and microarchitecture › instruction set architecture
high-level language architecture |
0.0 | 1 | 1987 | A GaAs-Based Microprocessor Architecture for Real-Time Applications · IEEE Trans. Computers 1987 |
Embedded and real-time systems › embedded processor
real-time processor architecture |
0.0 | 1 | 1987 | A GaAs-Based Microprocessor Architecture for Real-Time Applications · IEEE Trans. Computers 1987 |
Methods — techniques the papers use, named apart from their topics
stochastic petri nets · 0.0simulation · 0.0closed-form expressions · 0.0vertical migration · 0.0execution time modeling · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Mobile Metadata for Web-Based Image Query ServicesabstractPhotographic observations of the night sky can best be presented using a data model that conveys the observations, analysis, objects contained with the observations, and results of analysis pertaining to those objects. Such a model is proposed in this paper and it is referred to as the internet Flexible Image Transport System (iFITS), along with a mapping function to transform instances of the Sloan Digital Sky Survey (SDSS) Data Release 1 (DR1) to instances of iFITS, and a hybrid light-weight marshaling method to transfer DR1 data to the implementation of iFITS. iFITS is implemented as a mobile code agent that supports client-based image retrieval in web-based mobile computing environments. The implementation of iFITS was tested against the Image Query Service of SDSS Data Release 6 and the Revised Image Query Service recently proposed. The experiments results reported show a three-fold speedup for iFITS. Daniel Beatty, Noé Lopez-Benitez |
Mobile Data Management | 2 |
| 2006 | Enhanced Group Key Generation AlgorithmabstractGroup communication is becoming increasingly popular in Internet applications such as videoconferences, online chatting programs, games, and gambling. For secure communications, the integrity of messages, member authentication, and confidentiality must be provided among group members. To maintain message integrity, all group members use the Group Key (GK) for encrypting and decrypting messages while providing enough security to protect against passive attacks. Tree-based Group Diffie-Hellman (TGDH) is one of the efficient group key agreement protocols to generate the GK. TGDH assumes all members have an equal computing power. As one of the characteristics of distributed computing is heterogeneity, the member can be at a workstation, a laptop or even a mobile computer. Therefore, the group member sequence should be reordered in terms of the member's computing power to improve performance. This research proposes a reordering of members in the group key generation tree to enhance the efficiency of the group key generation. Sunghyuck Hong, Noé Lopez-Benitez |
NOMS | 2 |
| 2001 | High-Performance Implementation and Analysis of the Linkmap Program
Kulin Kothari, Noé Lopez-Benitez, S. E. Poduslo |
J. Biomed. Informatics | 2 |
| 2000 | On the Parallelization of Linkmap from the LINKAGE/FASTLINK Package
Aaditya Rai, Noé Lopez-Benitez, J. D. Hargis, S. E. Poduslo |
Comput. Biomed. Res. | 2 |
| 2000 | Petri-net based performance-evaluation of distributed homogeneous task systemsabstractTG (task graphs) are used to describe the execution of several tasks under some precedence constraints. Direct evaluation of TG provides an average completion time of the overall job, assuming no limits exist in the number of processing units and with no regard for allocation schemes. This paper presents a systematic approach for evaluating TG of jobs executed under predetermined allocation constraints. This extension of TG relies on GSPN (generalized stochastic Petri nets). A systematic mapping of a TG into a GSPN model is discussed. This GSPN model is extended to incorporate information about the static allocation of the set of tasks in the TG. An algorithm is implemented to evaluate static allocation schemes with or without task replication. However, for task replication, a homogeneous system is assumed because the execution time of those tasks does not change when allocated to various processing units. Also, under this assumption, task execution rates are modified by adding communication costs involved in sending data required by the next task, in turn, to execute. Thus, using a single model, TG are evaluated with constraints not only on where replicated and nonreplicated tasks are to be executed but on the number of processing units available, task allocation constraints, and the communication costs involved when they are remotely located. Noé Lopez-Benitez |
IEEE Trans. Reliab. | 1 |
| 1994 | Dependability Modeling and Analysis of Distributed ProgramsabstractPresents a modeling approach based on stochastic Petri nets to estimate the reliability and availability of programs in a distributed computing system environment. In this environment, successful execution of programs is conditioned on the successful access of related files distributed throughout the system. The use of stochastic Petri nets is demonstrated by extending a basic reliability model to account for repair actions when faults occur. To this end, two possible models are discussed: the global repair model, which assumes a centralized repair team that restores the system to its original status when a failure state is reached, and the local repair model, which assumes that repairs are localized to the node where they occur. The former model is useful in evaluating the availability of programs (or the availability of the hardware support) subject to hardware faults that are repaired globally; therefore, the programs of interest can be interrupted. On the other hand, the latter model can be used to evaluate program reliability in the presence of hardware faults subject to repair, without interrupting the normal operation of the system.> Noé Lopez-Benitez |
IEEE Trans. Software Eng. | 1 |
| 1992 | Dependability Analysis of Distributed Computing Systems using Stochastic Petri NetsabstractModels based on stochastic Petri nets are developed to estimate the reliability/availability of distributed systems. The modeling approach discussed combines stochastic Petri net modeling and previous reliability algorithms so that not only can failures of nodes and links be modeled, but also the effect of global repairs can be considered. The models can be used to derive estimations on the successful execution of one or more programs distributed in the system. In a distributed computing environment successful execution means that all distributed programs can access all the required remote files even in the presence of faults. A global repair model for a small system is considered in detail. A generalization and the results reported for complex systems were obtained by using the Stochastic Petri Net Package (SPNP).> Noé Lopez-Benitez |
SRDS | 1 |
| 1992 | Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor ArraysabstractA method for the generation of detailed models of fault-tolerant processor arrays, based on stochastic Petri nets (SPNs), is presented. A compact SPN model of the array associates with each transition a set of attributes that includes a discrete probability distribution. Depending on the type of component and the reconfiguration scheme, these probabilities are determined using simulation or closed-form expressions and correspond to the survival of the array given that a number of components required by the reconfiguration process are faulty.> Noé Lopez-Benitez, José A. B. Fortes |
IEEE Trans. Computers | 1 |
| 1987 | A GaAs-Based Microprocessor Architecture for Real-Time ApplicationsabstractThis paper analyzes the potential performance of a high-level language (HLL) microprocessor architecture for special- purpose real-time applications. Our approach is based on mapping of HLL constructs into microcode, a concept called vertical migration. An analytical execution-time model of the reduced vertical-migration architecture is developed. It is applied to two different workload models: one corresponding to statement mixes, and the other showing some HLL kernel routines. Performance evaluation results are compared to different forms of the reduced vertical-migration architecture, and in various application domains. We underline in this paper the, basic relationships among microprocessor architecture, GaAs technology, and real-time applications. Veljko M. Milutinovic, Noé Lopez-Benitez, Kai Hwang 0001 |
IEEE Trans. Computers | 2 |