Demo Data from EDBT 2026 / reviewers in the wild / expert
Motohiro Kawahito
dblp:72/2233
· DBLP profile ↗
13ranked-venue papers
6as first author
0since 2021 · last 2016
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 10 · 5 first-authorSystems, architecture and hardware · 6 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
9 papers |
Compilers and program optimization · 66% Runtime systems and virtual machines · 27% Program analysis · 6% | |
| Computer architecture, parallel and distributed computing, and storage systems
5 papers |
Memory systems · 56% Electronic design automation · 28% Performance modeling and evaluation · 8% |
Topics — the 17 heaviest of 20, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Runtime systems and virtual machines › dynamic compilation
just-in-time compilation |
0.3 | 7 | 2013 | A new idiom recognition framework for exploiting hardware-assist instructions · ASPLOS 2006 Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 Idiom recognition framework using topological embedding · ACM Trans. Archit. Code Optim. 2013 |
Compilers and program optimization › compiler analysis
idiom recognition |
0.2 | 2 | 2013 | Idiom recognition framework using topological embedding · ACM Trans. Archit. Code Optim. 2013 A new idiom recognition framework for exploiting hardware-assist instructions · ASPLOS 2006 |
Memory systems › memory management › virtual memory
address translation |
0.2 | 1 | 2014 | Optimizing Memory Translation Emulation in Full System Emulators · ACM Trans. Archit. Code Optim. 2014 |
Electronic design automation › hardware verification and test › functional verification › emulation
full-system emulation |
0.2 | 1 | 2014 | Optimizing Memory Translation Emulation in Full System Emulators · ACM Trans. Archit. Code Optim. 2014 |
Memory systems › virtual memory management
software TLB |
0.2 | 1 | 2014 | Optimizing Memory Translation Emulation in Full System Emulators · ACM Trans. Archit. Code Optim. 2014 |
Compilers and program optimization › interprocedural optimization
inlining |
0.1 | 3 | 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 Effectiveness of cross-platform optimizations for a java just-in-time compiler · OOPSLA 2003 A study of devirtualization techniques for a JavaTM Just-In-Time compiler · OOPSLA 2000 |
Runtime systems and virtual machines › virtual machine implementation
java virtual machine |
0.1 | 3 | 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 A Dynamic Optimization Framework for a Java Just-In-Time Compiler · OOPSLA 2001 A study of devirtualization techniques for a JavaTM Just-In-Time compiler · OOPSLA 2000 |
Compilers and program optimization
dynamic optimization |
0.1 | 2 | 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 A Dynamic Optimization Framework for a Java Just-In-Time Compiler · OOPSLA 2001 |
Compilers and program optimization › dynamic optimization
profile-guided optimization |
0.1 | 2 | 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 A Dynamic Optimization Framework for a Java Just-In-Time Compiler · OOPSLA 2001 |
Performance modeling and evaluation
simulation |
0.1 | 1 | 2014 | Optimizing Memory Translation Emulation in Full System Emulators · ACM Trans. Archit. Code Optim. 2014 |
Compilers and program optimization › dynamic optimization
adaptive compilation |
0.1 | 1 | 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 |
Compilers and program optimization
program specialization |
0.1 | 1 | 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 |
Program analysis
data flow analysis |
0.0 | 1 | 2003 | Effectiveness of cross-platform optimizations for a java just-in-time compiler · OOPSLA 2003 |
Program analysis › dynamic analysis › profiling
value profiling |
0.0 | 1 | 2001 | A Dynamic Optimization Framework for a Java Just-In-Time Compiler · OOPSLA 2001 |
Processor architecture and microarchitecture
instruction set architecture |
0.0 | 2 | 2006 | A new idiom recognition framework for exploiting hardware-assist instructions · ASPLOS 2006 Effective Sign Extension Elimination · PLDI 2002 |
Compilers and program optimization › compiler optimization › type-based optimization
devirtualization |
0.0 | 1 | 2000 | A study of devirtualization techniques for a JavaTM Just-In-Time compiler · OOPSLA 2000 |
Program analysis › dynamic analysis
profiling |
0.0 | 1 | 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compiler · ACM Trans. Program. Lang. Syst. 2005 |
Methods — techniques the papers use, named apart from their topics
topological embedding · 0.3profiling · 0.2STLB optimization · 0.2exact pattern matching · 0.2idiom recognition · 0.1instrumentation · 0.1value profiling · 0.1on-stack replacement · 0.1hardware trap · 0.1partial redundancy elimination · 0.0exception check elimination · 0.0sampling profiler · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | Re-constructing high-level information for language-specific binary re-optimizationabstractIn this paper, we show a binary optimizer can achieve competitive performance relative to a state-of-the-art source code compiler by re-constructing high-level information (HLI) from binaries. Recent advances in compiler technologies have resulted in a large performance gap between binaries compiled with old compilers and those compiled with latest ones. This motivated us to develop a binary optimizer for old binaries using a compiler engine for a latest source code compiler. However, a traditional approach to naively convert machine instructions into an intermediate representation (IR) of the compiler engine, does not allow us to take full advantage of optimization techniques available in the compiler. This is because the HLI, such as information about variables and their data types, is not available in such an IR. To address this issue, we have devised a technique to re-construct the HLI from binaries by using contextual information. This contextual information is a set of knowledge about specific compilation technologies, such as the conventions of data structures, the patterns of instruction sequences, and the semantics of runtime routines. With this technique, our binary optimizer has improved the performance of binaries generated from an older compiler by 40.1% on average in the CPU time for a set of benchmarks, which is close to the one due to a source-code recompilation with the same compiler engine, 55.2% on average. Toshihiko Koju, Reid Copeland, Motohiro Kawahito, Moriyoshi Ohara |
CGO | 3 |
| 2014 | Optimizing Memory Translation Emulation in Full System EmulatorsabstractThe emulation speed of a full system emulator (FSE) determines its usefulness. This work quantitatively measures where time is spent in QEMU [Bellard 2005], an industrial-strength FSE. The analysis finds that memory emulation is one of the most heavily exercised emulator components. For workloads studied, 38.1% of the emulation time is spent in memory emulation on average, even though QEMU implements a software translation lookaside buffer (STLB) to accelerate dynamic address translation. Despite the amount of time spent in memory emulation, there has been no study on how to further improve its speed. This work analyzes where time is spent in memory emulation and studies the performance impact of a number of STLB optimizations. Although there are several performance optimization techniques for hardware TLBs, this work finds that the trade-offs with an STLB are quite different compared to those with hardware TLBs. As a result, not all hardware TLB performance optimization techniques are applicable to STLBs and vice versa. The evaluated STLB optimizations target STLB lookups, as well as refills, and result in an average emulator performance improvement of 24.4% over the baseline. Xin Tong 0005, Toshihiko Koju, Motohiro Kawahito, Andreas Moshovos |
ACM Trans. Archit. Code Optim. | 3 |
| 2013 | Idiom recognition framework using topological embeddingabstractModern processors support hardware-assist instructions (such as TRT and TROT instructions on the IBM System z) to accelerate certain functions such as delimiter search and character conversion. Such special instructions are often used in high-performance libraries, but their exploitation in optimizing compilers has been limited. We devised a new idiom recognition technique based on a topological embedding algorithm to detect idiom patterns in the input programs more aggressively than in previous approaches using exact pattern matching. Our approach can detect a pattern even if the code segment does not exactly match the idiom. For example, we can detect a code segment that includes additional code within the idiom pattern. We also propose an instruction simplification for the idiom recognition. This optimization analyzes all of the usages of the output of the optimized code for a specific idiom. If we find that we do not need an actual value for the output but only a value in a subrange, then we can assign a value in that subrange as the output. The code generation can generate faster code with this optimization. We implemented our new idiom recognition approach based on the Java Just-In-Time (JIT) compiler that is part of the J9 Java Virtual Machine, and we supported several important idioms for the special hardware-assist instructions on the IBM System z and on some models of the IBM System p. To demonstrate the effectiveness of our technique, we performed two experiments. The first experiment was to see how many more patterns we can detect compared to the previous approach. The second experiment measured the performance improvements over the previous approaches. For the first experiment, we used the Java Compatibility Kit (JCK) API tests. For the second experiment we used the IBM XML parser, SPECjvm98, and SPCjbb2000. In summary, relative to a baseline implementation using exact pattern matching, our algorithm converted 76% more loops in JCK tests. On a z9, we also observed significant average performance improvement of the XML parser by 54%, of SPECjvm98 by 1.9%, and of SPECjbb2000 by 4.4%. Finally, we observed that the JIT compilation time increased by only 0.32% to 0.44%. Motohiro Kawahito, Hideaki Komatsu, Takao Moriyama, Hiroshi Inoue, Toshio Nakatani |
ACM Trans. Archit. Code Optim. | 1 |
| 2006 | A new idiom recognition framework for exploiting hardware-assist instructionsabstractModern processors support hardware-assist instructions (such as TRT and TROT instructions on IBM zSeries) to accelerate certain functions such as delimiter search and character conversion. Such special instructions have often been used in high performance libraries, but they have not been exploited well in optimizing compilers except for some limited cases. We propose a new idiom recognition technique derived from a topological embedding algorithm [4] to detect idiom patterns in the input program more aggressively than in previous approaches. Our approach can detect a pattern even if the code segment does not exactly match the idiom. For example, we can detect a code segment that includes additional code within the idiom pattern. We implemented our new idiom recognition approach based on the Java Just-In-Time (JIT) compiler that is part of the J9 Java Virtual Machine, and we supported several important idioms for special hardware-assist instructions on the IBM zSeries and on some models of the IBM pSeries. To demonstrate the effectiveness of our technique, we performed two experiments. The first one is to see how many more patterns we can detect compared to the previous approach. The second one is to see how much performance improvement we can achieve over the previous approach. For the first experiment, we used the Java Compatibility Kit (JCK) API tests. For the second one we used IBM XML parser, SPECjvm98, and SPCjbb2000. In summary, relative to a baseline implementation using exact pattern matching, our algorithm converted 75% more loops in JCK tests. We also observed significant performance improvement of the XML parser by 64%, of SPECjvm98 by 1%, and of SPECjbb2000 by 2% on average on a z990. Finally, we observed the JIT compilation time increases by only 0.32% to 0.44%. Motohiro Kawahito, Hideaki Komatsu, Takao Moriyama, Hiroshi Inoue, Toshio Nakatani |
ASPLOS | 1 |
| 2006 | Effective sign extension elimination for javaabstractComputer designs are shifting from 32-bit architectures to 64-bit architectures, while most of the programs available today are still designed for 32-bit architectures. Java, for example, specifies the frequently used “int” as a 32-bit signed integer. If such Java programs are executed on a 64-bit architecture, many 32-bit signed integers must be sign-extended to 64-bit signed integers for correct operations. This causes serious performance overhead. In this article, we present a fast and effective algorithm for eliminating sign extensions. We implemented this algorithm in the IBM Java Just-in-Time (JIT) compiler for IA-64. Our experimental results show that our algorithm effectively eliminates the majority of sign extensions. They also show that it improves performance by 6.9% for jBYTEmark and 3.3% for SPECjvm98 over the previously known best algorithm, while it increases JIT compilation time by only 0.11%. Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani |
ACM Trans. Program. Lang. Syst. | 1 |
| 2005 | Design and evaluation of dynamic optimizations for a Java just-in-time compilerabstractThe high performance implementation of Java Virtual Machines (JVM) and Just-In-Time (JIT) compilers is directed toward employing a dynamic compilation system on the basis of online runtime profile information. The trade-off between the compilation overhead and performance benefit is a crucial issue for such a system. This article describes the design and implementation of a dynamic optimization framework in a production-level Java JIT compiler, together with two techniques for profile-directed optimizations: method inlining and code specialization. Our approach is to employ a mixed mode interpreter and a three-level optimizing compiler, supporting level-1 to level-3 optimizations, each of which has a different set of trade-offs between compilation overhead and execution speed. A lightweight sampling profiler operates continuously during the entire period while applications are running to monitor the programs' hot spots. Detailed information on runtime behavior can be collected by dynamically generating instrumentation code that is installed to and uninstalled from the specified recompilation target code. Value profiling with this instrumentation mechanism allows fully automatic profile-directed method inlining and code specialization to be performed on the basis of call site information or specific parameter values at the higher optimization levels. The experimental results show that our approach offers high performance and low compilation overhead in both program startup and steady state measurements in comparison to the previous systems. The two profile-directed optimization techniques contribute significant portions of the improvements. Toshio Suganuma, Toshiaki Yasue, Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani |
ACM Trans. Program. Lang. Syst. | 3 |
| 2004 | Partial redundancy elimination for access expressions by speculative code motionabstractAbstract We present a new memory access optimization for Java to perform aggressive code motion for speculatively optimizing memory accesses by applying partial redundancy elimination (PRE) techniques. First, to reduce as many barriers as possible and to enhance code motion, we perform alias analysis to identify all the regions in which each object reference is not aliased. Secondly, we find all the possible barriers. Finally, we perform code motions in three steps. For the first step, we apply a non‐speculative PRE algorithm to move load instructions and their following instructions in the backwards direction of the control flow graph. For the second step, we apply a speculative PRE algorithm to move some of them aggressively before the conditional branches. For the third step, we apply our modified version of a non‐speculative PRE algorithm to move store instructions in the forward direction of the control flow graph and to even move some of them after the merge points. We implemented our new algorithm in our production‐level Java just‐in‐time compiler. Our experimental results show that our speculative algorithm improves the average (maximum) performance by 13.1% (90.7%) for jBYTEmark and 1.4% (4.4%) for SPECjvm98 over the fastest algorithm previously described, while it increases the average (maximum) compilation time by 0.9% (2.9%) for both benchmark suites. Copyright © 2004 John Wiley & Sons, Ltd. Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani |
Softw. Pract. Exp. | 1 |
| 2003 | Effectiveness of cross-platform optimizations for a java just-in-time compilerabstractThis paper describes the system overview of our Java Just-In-Time (JIT) compiler, which is the basis for the latest production version of IBM Java JIT compiler that supports a diversity of processor architectures including both 32-bit and 64-bit modes, CISC, RISC, and VLIW architectures. In particular, we focus on the design and evaluation of the cross-platform optimizations that are common across different architectures. We studied the effectiveness of each optimization by selectively disabling it in our JIT compiler on three different platforms: IA-32, IA-64, and PowerPC. Our detailed measurements allowed us to rank the optimizations in terms of the greatest performance improvements with the smallest compilation times. The identified set includes method inlining only for tiny methods, exception check eliminations using forward dataflow analysis and partial redundancy elimination, scalar replacement for instance and class fields using dataflow analysis, optimizations for type inclusion checks, and the elimination of merge points in the control flow graphs. These optimizations can achieve 90% of the peak performance for two industry-standard benchmark programs on these platforms with only 34% of the compilation time compared to the case for using all of the optimizations. Kazuaki Ishizaki, Mikio Takeuchi, Kiyokuni Kawachiya, Toshio Suganuma, Osamu Gohda, Tatsushi Inagaki, Akira Koseki, Kazunori Ogata, Motohiro Kawahito, Toshiaki Yasue, Takeshi Ogasawara, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani |
OOPSLA | 9 |
| 2002 | Effective Sign Extension EliminationabstractComputer designs are shifting from 32-bit architectures to 64-bit architectures, while most of the programs available today are still designed for 32-bit architectures. Java™, for example, specifies the frequently used int" as a 32-bit data type. If such Java programs are executed on a 64-bit architecture, many 32-bit values must be sign-extended to 64-bit values for integer operations. This causes serious performance overhead. In this paper, we present a fast and effective algorithm for eliminating sign extensions. We implemented this algorithm in the IBM Java Just-in-Time (JIT) compiler for IA-64™. Our experimental results show that our algorithm effectively eliminates the majority of sign extensions. They also show that it significantly improves performance, while it increases JIT compilation time by only 0.11%. We implemented our algorithm for programs in Java, but it can be applied to any language requiring sign extensions. Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani |
PLDI | 1 |
| 2001 | A Dynamic Optimization Framework for a Java Just-In-Time CompilerabstractThe high performance implementation of Java Virtual Machines (JVM) and just-in-time (JIT) compilers is directed toward adaptive compilation optimizations on the basis of online runtime profile information. This paper describes the design and implementation of a dynamic optimization framework in a production-level Java JIT compiler. Our approach is to employ a mixed mode interpreter and a three level optimizing compiler, supporting quick, full, and special optimization, each of which has a different set of tradeoffs between compilation overhead and execution speed. a lightweight sampling profiler operates continuously during the entire program's exectuion. When necessary, detailed information on runtime behavior is collected by dynmiacally generating instrumentation code which can be installed to and uninstalled from the specified recompilation target code. Value profiling with this instrumentation mechanism allows fully automatic code specialization to be performed on the basis of specific parameter values or global data at the highest optimization level. The experimental results show that our approach offers high performance and a low code expansion ratio in both program startup and steady state measurements in comparison to the compile-only approach, and that the code specialization can also contribute modest performance improvement Toshio Suganuma, Toshiaki Yasue, Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani |
OOPSLA | 3 |
| 2000 | Effective Null Pointer Check Elimination Utilizing Hardware Trap
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani |
ASPLOS | 1 |
| 2000 | A study of devirtualization techniques for a JavaTM Just-In-Time compilerabstractMany devirtualization techniques have been proposed to reduce the runtime overhead of dynamic method calls for various object-oriented languages, however, most of them are less effective or cannot be applied for Java in a straightforward manner. This is partly because Java is a statically-typed language and thus transforming a dynamic call to a static one does not make a tangible performance gain (owing to the low overhead of accessing the method table) unless it is inlined, and partly because the dynamic class loading feature of Java prohibits the whole program analysis and optimizations from being applied.We propose a new technique called direct devirtualization with the code patching mechanism. For a given dynamic call site, our compiler first determines whether the call can be devirtualized, by analyzing the current class hierarchy. When the call is devirtualizable and the target method is suitably sized, the compiler generates the inlined code of the method, together with the backup code of making the dynamic call. Only the inlined code is actually executed until our assumption about the devirtualization becomes invalidated, at which time the compiler performs code patching to make the backup code executed subsequently. Since the new technique prevents some code motions across the merge point between the inlined code and the backup code, we have furthermore implemented recently-known analysis techniques, such as type analysis and preexistence analysis, which allow the backup code to be completely eliminated. We made various experiments using 16 real programs to understand the effectiveness and characteristics of the devirtualization techniques in our Java Just-In-Time (JIT) compiler. In summary, we reduced the number of dynamic calls by ranging from 8.9% to 97.3% (the average of 40.2%), and we improved the execution performance by ranging from -1% to 133% (with the geometric mean of 16%). Kazuaki Ishizaki, Motohiro Kawahito, Toshiaki Yasue, Hideaki Komatsu, Toshio Nakatani |
OOPSLA | 2 |
| 2000 | Design, implementation, and evaluation of optimizations in a JavaTM Just-In-Time compilerabstractThe Java language incurs a runtime overhead for exception checks and object accesses, which are executed without an interior pointer in order to ensure safety. It also requires type inclusion test, dynamic class loading, and dynamic method calls in order to ensure flexibility. A ‘Just-In-Time’ (JIT) compiler generates native code from Java byte code at runtime. It must improve the runtime performance without compromising the safety and flexibility of the Java language. We designed and implemented effective optimizations for a JIT compiler, such as exception check elimination, common subexpression elimination, simple type inclusion test, method inlining, and devirtualization of dynamic method call. We evaluate the performance benefits of these optimizations based on various statistics collected using SPECjvm98, its candidates, and two JavaSoft applications with byte code sizes ranging from 23 000 to 280 000 bytes. Each optimization contributes to an improvement in the performance of the programs. Copyright © 2000 John Wiley & Sons, Ltd. Kazuaki Ishizaki, Motohiro Kawahito, Toshiaki Yasue, Mikio Takeuchi, Takeshi Ogasawara, Toshio Suganuma, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani |
Concurr. Pract. Exp. | 2 |