Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data.

Suzanne Rivoire

dblp:72/4763 · DBLP profile ↗
← Back
5ranked-venue papers
3as first author
1since 2021 · last 2023
0000-0002-5660-4626ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorHuman-computer interaction and ubiquitous computing · 2 · 1 first-author · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Performance modeling and evaluation · 49% Energy-efficient computing · 40% High-performance computing · 11%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation
benchmarking
0.322015
Node variability in large-scale power measurements: perspectives from the Green500, Top500 and EEHPCWG · SC 2015
JouleSort: a balanced energy-efficiency benchmark · SIGMOD Conference 2007
Energy-efficient computing
power measurement
0.212015
Node variability in large-scale power measurements: perspectives from the Green500, Top500 and EEHPCWG · SC 2015
High-performance computing
supercomputing
0.112015
Node variability in large-scale power measurements: perspectives from the Green500, Top500 and EEHPCWG · SC 2015

Methods — techniques the papers use, named apart from their topics

statistical characterization · 0.2external sort · 0.1
YearPublicationVenuePosition
2023 QC.py: Quantum Computing Simulation and Visualization Suite
abstract
Quantum computing (QC) is a rapidly growing field linking the disciplines of mathematics, physics, and computer science. CS students and software developers are a natural talent pool for the future QC workforce, but existing QC simulation and visualization tools are not designed with their background in mind. We present QC.py, a full-featured, open-source Python simulation and visualization tool for quantum circuits, with a feature set tailored to the background of CS students and software practitioners.
Brennan T. Freeze, Aundre Barras, Paris Osuch, Soren Sevier Richenberg, Suzanne Rivoire
SIGCSE (2)5
2015 Node variability in large-scale power measurements: perspectives from the Green500, Top500 and EEHPCWG
abstract
The last decade has seen power consumption move from an afterthought to the foremost design constraint of new supercomputers. Measuring the power of a supercomputer can be a daunting proposition, and as a result, many published measurements are extrapolated. This paper explores the validity of these extrapolations in the context of inter-node power variability and power variations over time within a run. We characterize power variability across nodes in systems at eight supercomputer centers across the globe. This characterization shows that the current requirement for measurements submitted to the Green500 and others is insufficient, allowing variations of up to 20% due to measurement timing and a further 10--15% due to insufficient sample sizes. This paper proposes new power and energy measurement requirements for supercomputers, some of which have been accepted for use by the Green500 and Top500, to ensure consistent accuracy.
Thomas Scogland, Jonathan Azose, David Rohr, Suzanne Rivoire, Natalie J. Bates, Daniel Hackenberg
SC4
2010 A breadth-first course in multicore and manycore programming
abstract
The technique of scaling hardware performance through increasing the number of cores on a chip requires programmers to learn to write parallel code that can exploit this hardware. In order to expose students to a variety of multicore programming models, our university offered a breadth-first introduction to multicore and manycore programming for upper-level undergraduates. Our students gained programming experience with three different parallel programming models, two of which are less than five years old and targeted specifically to multicore and manycore computing. Assessments throughout the semester showed that the course gave students a broad base of experience from which they will be able to understand ongoing developments in the field.
Suzanne Rivoire
SIGCSE1
2007 JouleSort: a balanced energy-efficiency benchmark
abstract
The energy efficiency of computer systems is an important concern in a variety of contexts. In data centers, reducing energy use improves operating cost, scalability, reliability, and other factors. For mobile devices, energy consumption directly affects functionality and usability. We propose and motivate JouleSort, an external sort benchmark, for evaluating the energy efficiency of a wide range of computer systems from clusters to handhelds. We list the criteria, challenges, and pitfalls from our experience in creating a fair energy-efficiency benchmark. Using a commercial sort, we demonstrate a JouleSort system that is over 3.5x as energy-efficient as last year's estimated winner. This system is quite different from those currently used in data centers. It consists of a commodity mobile CPU and 13 laptop drives connected by server-style I/O interfaces.
Suzanne Rivoire, Mehul A. Shah, Parthasarathy Ranganathan, Christoforos E. Kozyrakis
SIGMOD Conference1
2006 Vector Lane Threading
abstract
Multi-lane vector processors achieve excellent computational throughput for programs with high data-level parallelism (DLP). However, application phases without significant DLP are unable to fully utilize the datapaths in the vector lanes. In this paper, we propose vector lane threading (VLT), an architectural enhancement that allows idle vector lanes to run short-vector or scalar threads. VLT-enhanced vector hardware can exploit both data-level and thread-level parallelism to achieve higher performance. We investigate implementation alternatives for VLT, focusing mostly on the instruction issue bandwidth requirements. We demonstrate that VLT's area overhead is small. For applications with short vectors, VLT leads to additional speedup of IA to 23 over the base vector design. For scalar threads, VLT outperforms a 2-way CMP design by a factor of two. Overall, VLT allows vector processors to reach high computational throughput for a wider range of parallel programs and become a competitive alternative to CMP systems
Suzanne Rivoire, Rebecca Schultz, Tomofumi Okuda, Christoforos E. Kozyrakis
ICPP1