Demo Data from EDBT 2026 / reviewers in the wild / expert
Purnendu K. Mozumder
dblp:72/4930
· DBLP profile ↗
3ranked-venue papers
1as first author
0since 2021 · last 1994
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 96% Integrated circuit design · 4% |
Topics — the 6 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › CAD framework
design tool integration |
0.0 | 1 | 1994 | Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Electronic design automation
technology computer-aided design |
0.0 | 1 | 1994 | Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Electronic design automation › design for manufacturability
wafer representation |
0.0 | 1 | 1994 | Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Electronic design automation
design for manufacturability |
0.0 | 1 | 1990 | Statistical control of VLSI fabrication processes · Proc. IEEE 1990 |
Electronic design automation
statistical process control |
0.0 | 1 | 1990 | Statistical control of VLSI fabrication processes · Proc. IEEE 1990 |
Electronic design automation › technology computer-aided design
process simulation |
0.0 | 1 | 1994 | Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Methods — techniques the papers use, named apart from their topics
object-oriented design · 0.0multivariate statistical analysis · 0.0in situ measurement · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1994 | Semiconductor wafer representation for TCADabstractThis work describes the Semiconductor Wafer Representation (SWR) for representing and manipulating wafer state during process and device simulation. The goal of the SWR is to provide an object-oriented interface to a collection of functions designed for developing and integrating Technology CAD (TCAD) applications. By providing functions which can be common across many applications, we aim to greatly reduce tool development and integration time. Corporate, vendor, and university TCAD developers have worked together under the auspices of the CAD Framework Initiative to create an architecture and C++ programming interface for an SWR 1.0 draft standard. Here we describe this architecture and the results of creating and using a prototype implementation of the standard both to integrate existing TCAD tools and to develop simple new tools.> Martin D. Giles, Duane S. Boning, Goodwin R. Chin, Walter C. Dietrich Jr., Michael S. Karasick, Mark E. Law, Purnendu K. Mozumder, Lee R. Nackman, V. T. Rajan, D. M. H. Walker, Robert H. Wang, Alexander S. Wong |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 7 |
| 1993 | An integrated technology CAD system for process and device designersabstractA workstation-based integrated system with a highly interactive X/Motif user interface is discussed. At present, TSUPREM3, TSUPREM4 and TPISCES have been integrated into this system. The components of the integrated TCAD system include a generic process recipe editor, a mask editor, a 2-D wafer structure builder (using 1-D/2-D process simulation profiles), a mesh generator for 2-D device simulation, a device simulation recipe editor, and graphical postprocessors for both process and device analysis. The user of this system inputs the specification of a process recipe and the layout of the device structure to be fabricated. The system then runs process and device simulation using incremental and shared simulation strategies to generate wafer structure and electrical device characteristics. An interactive user interface guides the user through the process and device simulation flow. thereby aiding what-if analysis of process and device tradeoffs.> K. S. V. Gopalarao, Purnendu K. Mozumder, Duane S. Boning |
IEEE Trans. Very Large Scale Integr. Syst. | 2 |
| 1990 | Statistical control of VLSI fabrication processesabstractRandom fluctuations in very large scale integrated circuit (VLSIC) fabrication processes cause the parametric production yield to fall below acceptable levels, resulting in a loss of competitive edge. To address this problem, a framework for an integrated computer-aided-design-computer-aided-manufacturing (CAD-CAM) system that will enable the design, fabrication, control, and diagnosis of present and future VLSICs to be carried out profitably is proposed. It is argued that the inefficiencies of present-day CAM systems are due to the lack of appropriate methodologies for process monitoring and statistical techniques to analyze the in-process and end-of-process data. Methodologies for monitoring lots in fabrication lines, using in situ measurements, and for controlling lots, using the multivariate distribution of observable in-process parameters, are discussed. These methodologies attempt to eliminate the pitfalls of the previous statistical process control algorithms. The software system that implements the algorithms has shown encouraging results when applied to industrial fabrication lines. Purnendu K. Mozumder, Andrzej J. Strojwas |
Proc. IEEE | 1 |