XML delivers key advantages in interoperability due to its flexibility, expressiveness, and platform-neutrality. As XML has become a performance-critical aspect of the next generation of business computing infrastructure, however, it has become increasingly clear that XML parsing often carries a heavy performance penalty, and that current, widely-used parsing technologies are unable to meet the performance demands of an XML-based computing infrastructure. Several efforts have been made to address this performance gap through the use of grammar-based parser generation. While the performance of generated parsers has been significantly improved, adoption of the technology has been hindered by the complexity of compiling and deploying the generated parsers. Through careful analysis of the operations required for parsing and validation, we have devised a set of specialized byte codes, designed for the task of XML parsing and validation. These byte codes are designed to engender the benefits of fine-grained composition of parsing and validation that make existing compiled parsers fast, while being coarse-grained enough to minimize interpreter overhead. This technique of using an interpretive,validating parser balances the need for performance against the requirements of simple tooling and robust scalable infrastructure. Our approach is demonstrated with a specialized schema compiler, used to generate byte codes which in turn drive an interpretive parser. With almost as little tooling and deployment complexity as a traditional interpretive parser, the byte code-driven parser usually demonstrates performance within 20% of the fastest fully compiled solutions.

This paper describes an experimental system in which customized high performance XML parsers are prepared using parser generation and compilation techniques. Parsing is integrated with Schema-based validation and deserialization, and the resulting validating processors are shown to be as fast as or in many cases significantly faster than traditional nonvalidating parsers. High performance is achieved by integration across layers of software that are traditionally separate, by avoiding unnecessary data copying and transformation, and by careful attention to detail in the generated code. The effect of API design on XML performance is also briefly discussed..

Audio mixing panels have traditionally been implemented using analog circuits. The limitations of analog circuits, noise and flexibility, have been outweighed by the the power requirements and complexity of digital alternatives. The power consumption of digital processing circuits can be reduced by the use of VLSI circuits. The primary remaining limitation, circuit complexity, is minimized by using a simple self-framing serial data format for transmission of signals. Control circuitry is minimized by using the same serial data format for transmission of packetized control data. An attractive digital VLSI architecture for an audio mixing panel is proposed. The proposed digital interface standard is not limited to audio mixers; use of this interface standard will allow other speech or audio signal processing chips to be easily integrated into a system. A VLSI chip was built to prove the viability of the digital audio system concept. The chip accepts two streams of digitized audio samples, and selectively delays one stream to provide word synchronization with the other. The chip may be used in audio mixers and signal processors, or may be adapted as a subcomponent of larger chips.

Abstract Pascal case statements can be compiled using a variety of methods, including comparison trees and branch tables. The scheme discussed here combines the two techniques to allow comparison trees with entries that are branch tables. The use of a combination of the two techniques is shown to adapt well to certain instances of case statements. Extensions to the standard case statement also require such a scheme to obtain an efficient implementation.