Alternate RF testing is a very promising candidate for replacing the costly standard specification-based approach. The defect filter in the alternate test flow is a crucial preparatory step for the overall success of alternate test. In this paper, we present a novel nonlinear defect filter based on an estimate of the joint probability density function of the alternate measurements. The construction of the filter does not require a defect dictionary and can accommodate any underlying density without needing any prior knowledge regarding its parametric form.

Multiple-input-multiple-output (MIMO)-based systems are extremely popular as they offer data rates as twice as fast as currently available systems. Their testing becomes more complicated due to the increased number of RF paths. This increases the overall test cost of these devices both in terms of test time and instrumentation cost. In this paper, we demonstrate a low cost MIMO test solution which targets critical specifications that are fundamental to the MIMO system operation, such as gain, IIP3, and phase imbalances between the RF paths. Our test methodology measures these parameters with a single test setup that enables the calculation of these performance parameters. Using the proposed test method, RF MIMO systems can be tested using a mixed signal tester, and on-board circuitry within a reasonable accuracy. Both simulation and measurement results confirm the high accuracy and repeatability of our test technique.

Alternate RF testing is a very promising candidate for replacing the costly standard specification-based approach. The defect filter in the alternate test flow is a crucial preparatory step for the overall success of alternate test. In this paper, we present a novel nonlinear defect filter based on an estimate of the joint probability density function of the alternate measurements. The construction of the filter does not require a defect dictionary and can accommodate any underlying density without needing any prior knowledge regarding its parametric form.

In this paper, we present a technique to enable accurate built-in measurement of EVM for OFDM transceivers. This measurement technique only relies on the decoded bit pattern, and does not require any additional test equipment. In order to accurately predict EVM without using analog signal analysis, we intentionally code more symbols into the bit pattern in test mode, which enables the decoding of IQ signals in finer granularity. We present an innovative DFT technique to measure EVM on-chip with very little overhead. We also provide an analytical framework to determine how the DFT technique needs to be implemented. Experimental results using MATLAB simulations and hardware measurements confirm the accuracy of the proposed technique.

Due to the increasing complexity of radio-frequency circuits, their testing becomes more challenging. A large number of performance parameters under several operation conditions are needed in order to ensure compliance to specifications. In this paper, we present a low-cost test methodology that determines significant performance parameters, such as path gainIIP3, quadrature imbalances, noise, bit error rate, and error vector magnitude through a single test setup. The proposed test methodology is applicable for both single-carrier and multicarrier systems. Simulation and measurement results indicate that these performance parameters can be calculated and estimated accurately through a single test setup and using a shorter test sequence than required by traditional techniques. In addition, a calibration technique is presented for single-carrier systems to recover marginally failing devices through analytically correcting performance parameters.

Characterization of RF ICs based on their error vector magnitude (EVM) is gaining a lot of attention in the industry. In order to deliver this specification at a reasonable cost, the input test signal and the analysis techniques have to be optimized such that EVM testing can provide a robust pass/fail decision while utilizing a reasonable amount of tester resources. In this paper, we propose techniques to optimize EVM testing, both from input signal generation and from output analysis perspectives. Our goal is to achieve both efficient and reliable test approaches for WLAN (Wireless Local Area Networks) circuits.

Radio-frequency (RF) test cost is soaring due to the increasing complexity of RF devices. Radically new test approaches that enable test time reduction while ensuring product quality are needed to reduce the overall product cost. In this paper, we present a test development methodology for RF circuits based on novel parametric, open-circuit, and short-circuit defect models. We inject parametric defects as deviations in physical circuit parameters, such as resistances, transistor widths, and lengths, and inject open- and short-circuit defects into the critical locations that are derived from the layout using inductive fault analysis. Despite fault injection, we consider a circuit unacceptable only if it violates any one of the performance specifications. Our test development method aims at reducing not only the number of measurements but also the overall test hardware cost by incorporating the relative setup cost of each measurement into our selection criteria. Experimental results on an RF front-end device show that our test methodology reduces the test time by 50% and the number of test setups by 17% while identifying all unacceptable circuit instances with a 99% failure coverage without any yield loss.

As radio frequency (RF) devices become more complex, the specifications become more stringent. In order to guarantee successful operation and compliance to certain specifications, digital correction techniques that compensate the device impairments are needed. In this paper, we present an analytical digital in-phase (I) and quadrature (Q) imbalance and non-linear compression correction methodology that improves the system bit error rate (BER). The gain and phase imbalances are corrected by using the gain and phase imbalance test data obtained during the product testing. The non-linear compression term is removed using Newton's method. The proposed test methodology is applicable for both burst based systems and continuous systems. Simulation results indicate that the proposed method improves the BER even under harsh noise contamination. The computational overhead of the compensation technique is minimal.

As radio frequency (RF) devices become more complex and the integration levels increase, their testing becomes more challenging. In order to guarantee successful operation and compliance to certain specifications, measurement of a large number performance parameters under the prescribed operation conditions is needed. Such detailed characterization typically necessitates long test times and expensive instrumentation, increasing the test cost. In this paper, we present a low cost test methodology that determines the RF device's vital performance parameters, such as path gain, IIP3, quadrature imbalances, noise, bit error rate (BER), and error vector magnitude (EVM) through a single test setup. The proposed test methodology is applicable for both single carrier systems and multi-carrier systems. Simulation and measurement results indicate that these performance parameters can be calculated and estimated accurately through a single test set-up and using a shorter test sequence than required by traditional techniques.

Circuit and test yield information provides essential feedback to circuit designers and test engineers to evaluate their designs and test set-ups. Traditionally, Monte Carlo analysis and other sample-and-simulate based approaches have been used for yield estimation. However, such computationally costly techniques cannot be used if yield estimation needs to be repeated multiple times, as in the case of test evaluation. In this paper, we propose a technique to conduct accurate and efficient overall yield estimation based on hybrid quadratic modelling and hierarchical statistical profiling. We also develop compatible models for environmental noise and measurement error, two most important error sources in the test process. Our experiments on a baseband amplifier and a cascaded LNA-mixer circuit confirm that the proposed yield estimation technique achieves significant computational time saving with negligible accuracy loss when used for multiple test set-up evaluations.

Multiple input multiple output (MIMO) based systems have recently received a lot of attention as their projected data rate is twice as fast as the currently available systems. Due to the increased number of RF paths, the testing becomes more complicated, thereby increasing the overall test cost of these devices. In this paper, the authors propose a low cost MIMO test solution which targets critical specifications that are fundamental to the MIMO system operation, such as gain, IIP3, and phase imbalances between the RF paths. Our test methodology measures these parameters with a single test setup that enables the calculation of the relevant performance parameters. Using the proposed test method, RF MIMO systems can be tested using a mixed signal tester, and on-board circuitry with a reasonable accuracy. Both simulation and measurement results confirm the high accuracy and repeatability of our test technique

The increasing share of test and packaging as a percentage of the overall cost for RF transceivers necessitate, radically test new approaches to both wafer-level and final production testing. We present a new system-level test setup for voltage-controlled oscillator (VCO) modulating transceiver architectures that we call the delayed-RF setup, along with a novel, all-digital design-for-testability (DFT) modification that enables coverage of the most important system-level specifications. The delayed-RF setup can be used during wafer sort, thus preventing the packaging of nonfunctional dies. Based on this setup and the DFT technique, we present an automatic test development methodology for FM transceivers using frequency-domain signature analysis. We develop two distinct pass/fail criteria based on eigensignatures and envelope signatures and a test generation algorithm that aims at minimizing the required delay while attaining full coverage of target faults. We develop a fault injection and simulation platform for a VCO-modulation, low-IF transceiver architecture using MATLAB and behavioral models including nonideal response. The proposed methodology enables the automation of the test generation process, thus reduces the test development time. Experimental results have shown a 90% reduction in the required delay thereby reducing the cost of this test hardware item

As wireless LAN devices become more prevalent in the consumer electronics market, there is an ever increasing pressure to reduce their overall cost. The test cost of such devices is an appreciable percentage of the overall cost, which typically results from the high number of specifications, the high number of distinct test set-ups and equipment pieces that need to be used, and the high cost of each test set-up. In this paper, we investigate the versatility of EVM measurements to test the variable-envelope WLAN (Wireless Local Area Networks) receiver and transmitter characteristics. The goal is to optimize EVM test parameters (input data and test limits) and to reduce the number of specification measurements that require high test times and/or expensive test equipment. Our analysis shows that enhanced EVM measurements(optimized data sequence and limits, use of RMS, scale, and phase error vector values) in conjunction with a set of simple path measurements (input-output impedances) can provide the desired fault coverage while eliminating lengthy spectrum mask and noise figure tests

Multiple input multiple output (MIMO) systems that enable data transfer rates beyond 100 Mbps for WLAN applications is under development and will emerge rapidly. While the higher data rates will enable numerous features in modern communication devices, the industry has to face the soaring test cost due to the increased test complexity and test time. Since MIMO systems have multiple RF paths, each path needs to be individually tested. Moreover, mismatch parameters among the multiple paths require synchronized sampling of RF signals, requiring complicated equipment In this paper, we propose a low cost MIMO test solution that targets the specifications that are fundamental for MIMO operation, such as gain, IIP3, and phase imbalances between the RF paths. Our test methodology measures these parameters with a high accuracy while requiring only one RF frequency synthesizer. Using the proposed test method, RF MIMO systems can be tested using a mixed signal tester and a single fixed frequency RF signal generator.

The test cost of RF systems is an increasing percentage of the overall system cost. This trend is mainly due to the traditional RF testing schemes based on the full measurement of specifications over a wide range of input conditions. In this paper, we present a test development methodology for RF circuits based on a novel parametric fault definition. We target deviations in physical circuit parameters, such as a resistance or the width of a transistor. However, we consider a circuit faulty only if it violates a specification. Our test development method aims at reducing not only the number of measurements, but also the overall test hardware cost by incorporating the relative set-up cost of each measurement into our selection criteria. Experimental results on a low-noise amplifier (LNA) circuit show that our test development technique reduces the overall test time (49%-67%) as well as the number of required measurement set-ups (17%-33%) considerably. By defining the target faults based on specification violations, our technique also provides high confidence in the test quality.

The test cost of RF systems is an increasing percentage of the overall system cost. This trend is mainly due to the traditional RF testing scheme based on measurement of specifications over a wide frequency range. A lower cost alternative is to use defect-based testing for RF circuits. However, the traditional defect models in the analog domain need to be revised to include high frequency effects in the RF domain. In this paper, we present a new defect model for breaks in metal traces to be used for defect-based testing in the RF domain. We present our fault model based on DC, AC, and noise characteristics and provide a case study for a transistor-level RF front-end. We confirm the AC characteristics of the model through EM simulations and compare our detectability results with the results of the resistive open-circuit model traditionally used in the analog test domain. Our study confirms that in many cases the resistive-based open-circuit model yields overly optimistic detectability results for defects in the signal path. We show that targeting particular defects and using their detectability information, the overall test time of RF devices can be reduced appreciably

Decreasing profit margins and time-to-market windows for radiofrequency transceivers, rule out the traditional component-based testing and diagnosis methods. Over the past few years, there has been a significant shift in the transceiver test methods towards full-path and loop-back testing. However, the benefits of path-based testing cannot be fully attained unless complimentary diagnosis methods can be developed. In this paper, we present an adaptive diagnosis methodology to identify the failing component in RF receivers. Once the fault type (hard fault or soft fault) is identified using eigensignature correlations, input signals are selected and ambiguity groups determined. A new input signal is applied based on the ambiguity groups until full diagnostic resolution is reached or test inputs are exhausted. While it is typically believed that partitioned parameters, such as the gain of an individual component, cannot be fully diagnosed, the inherently non-linear behavior of analog blocks results in distinguishable response patterns even for scalar parameters. Experimental results confirm that diagnosis using only path-based measurements is viable.

We present an automatic test development methodology for FM transceivers based on frequency-domain signature analysis and delayed-RF set up. We develop two distinct pass/fail criteria based on eigensignatures and envelope signatures and a test generation algorithm that aims at minimizing the required delay while attaining full coverage of target faults. We develop a fault injection and simulation platform for a VCO-modulation, low-IF transceiver architecture using MATLAB and behavioral models including non-ideal response. The proposed methodology enables the automation of the test generation process, thus reduces the test development time. Experimental results have shown a 90% reduction in the required delay thereby reducing the cost of this test hardware item.