Cloud computing is becoming increasingly pervasive and is being adopted even for high performance computing and mission critical applications. As cloud computing extends its usage, understanding of its performance becomes more important. In this paper, we present the system performance using Amazon EC2, representing a large public cloud platform, and OpenStack, representing the most popular open-source infrastructure-as-a-service cloud platform that can be used to implement both private and public clouds. Our study covers the performance of all significant cloud infrastructure resources - CPU, memory, storage, and network. We compare the performance of the public Amazon EC2 and a private OpenStack platform with similar configurations using several benchmarks. We compare and analyze diverse performance aspects based on different hypervisor, storage, and/or network configurations. For the OpenStack platform, we measure virtualization overhead for each resource. We also investigated the performance impact of more advanced features of each cloud, including faster storage options of AWS and the Infiniband network fabric with the Chameleon OpenStack platform.

Cloud computing is revolutionizing the information technology field. However, clouds today have not yet addressed real-time applications. Current work has shown that real-time hypervisors are capable of allowing virtual machines to meet real-time requirements. Other work has looked at statically allocating resources to virtual guests, which allow those guests to meet deadlines. In this paper, we present DART-C (Demand-based Allocation for Real-Time Clouds), a dynamic real-time cloud framework that allows automated adaptation to these types of workloads. Many applications follow dynamic multi-modal execution patterns, with varying computational requirements over time. DART-C provides demand-based elasticity to support changing real-time requirements by enabling applications to report mode changes to a resource manager, which reallocates resources based on need. We also describe a prototype and demonstrate up to 62% in system resource utilization savings compared to a static allocation, when running a synthetic application set.

As more scientific workloads are moved into the cloud, the need for high performance accelerators increases. Accelerators such as GPUs offer improvements in both performance and power efficiency over traditional multi-core processors, however, their use in the cloud has been limited. Today, several common hypervisors support GPU passthrough, but their performance has not been systematically characterized. In this paper we show that low overhead GPU passthrough is achievable across 4 major hypervisors and two processor microarchitectures. We compare the performance of two generations of NVIDIA GPUs within the Xen, VMWare ESXi, and KVM hypervisors, and we also compare the performance to that of Linux Containers (LXC). We show that GPU passthrough to KVM achieves 98 -- 100\% of the base system's performance across two architectures, while Xen and VMWare achieve 96 -- 99\% of the base systems performance, respectively. In addition, we describe several valuable lessons learned through our analysis and share the advantages and disadvantages of each hypervisor/GPU passthrough solution.

Current cloud computing infrastructure typically assumes a homogeneous collection of commodity hardware, with details about hardware variation intentionally hidden from users. In this paper, we present our approach for extending the traditional notions of cloud computing to provide a cloud-based access model to clusters that contain a heterogeneous architectures and accelerators. We describe our ongoing work extending the Open Stack cloud computing stack to support heterogeneous architectures and accelerators, and our experiences running Open Stack on our local heterogeneous cluster testbed.

This paper presents a prototype autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA¿s configurable logic, while resulting higher level data products are monitored by cognitive algorithms residing on an embedded processor. The cognitive algorithms develop situational awareness about the platform¿s environment, and use this information to modify and tune signal processing in real-time using active partial reconfiguration. This system was realized on a Xilinx Virtex4 FX 100 device on a pulse parameter measurement application utilizing a Bayesian Network cognitive algorithm. Changes in the RF environment were correctly detected 96.7% of the time and mitigation filters which resulted in at least 3dB interference rejection improvement were instanced 81% of the time. This system realizes a 71.4× reduction in size compared to static implementations and a 26-43× reduction in reaction times compared to human in the loop systems.

Stream processing exploits the properties of stream applications such as parallelism and throughput-oriented nature of the applications. One of the most recent approaches is community-supported Morphware stable interface (MSI) used as a stable abstraction between high-level compilers (HLC) and low-level architecture-specific compilers (LLC). We focus on one part of the MSI, the stream virtual machine (SVM). We implemented a high-level compiler that produces SVM output renderings and SVM implementation. The SVM is implemented with the Raw compiler as the LLC and an accompanying library. We also implemented stream applications such as matrix multiplication, FIR bank, and ground moving target indicator (GMTI) using the implemented compilers. These applications are optimized and the results are analyzed. The results show that the SVM framework is generally suitable for streaming applications on Raw processor.

We consider a resource synthesis technique for realtime systems where dynamic voltage scaling is supported, the energy budget is limited, and the performance of the system depends on how resources and energy are used. We propose a resource synthesis technique that derives both the supply voltages and the resource allocation of the tasks in the system to maximize system performance. The resulting system satisfies real-time schedulability and energy requirements.

This paper presents an optimal voltage synthesis technique for a satellite application to maximize system performance subject to energy budget. A period of a satellite's orbit is partitioned into several independent regions with different characteristics such as type of computation, importance, performance requirements, and energy consumptions. Given a periodic energy recharge model, optimal voltages for the regions are synthesized such that the overall performance is maximized within the energy budget in the period.

We consider a resource synthesis technique for real-time systems where the energy budget is limited and the performance of the system depends on how resources and energy are used. We consider two performance models for a task: (1) a task has variable execution time and performance of a task depends on the amount of execution time received, and (2) the execution time of a task is constant and the performance of a task depends on its frequency. We first propose an optimal resource synthesis technique which maximizes system performance without energy constraints. We prove its optimality with the earliest deadline first (EDF) scheduling policy when the performance function of a task is non-decreasing and concave. We propose an energy-aware resource allocation technique for systems with energy constraints using the same analytical framework. The energy-aware resource synthesis technique considers both resource usage and energy consumption to find a near optimal solution that maximizes system performance within the energy budget.

For multiple FPGA systems, the limited number of I/O pins causes many problems. To solve these problems, efficient communication scheduling among FPGAs is crucial for obtaining high CLB utilization. We provide a heuristic for the NP-complete scheduling algorithm. Experimental results show that our algorithm generates excellent communication schedules: more than 90% of the randomly generated problem instances were scheduled with less than 20% overhead compared with an optimal algorithm. The execution time of the scheduling algorithm is two orders of magnitude less than the optimal scheduling algorithm.

This paper presents a design synthesis method for distributed embedded systems. In such systems, computations can flow through long pipelines of interacting software components, hosted on a variety of resources, each of which is managed by a local scheduler. Our method automatically calibrates the local resource schedulers to achieve the system's global end-to-end performance requirements. A system is modeled as a set of distributed task chains (or pipelines), where each task represents an activity requiring nonzero load from some CPU or network resource. Task load requirements can vary stochastically due to second-order effects like cache memory behavior, DMA interference, pipeline stalls, bus arbitration delays, transient head-of-line blocking, etc. We aggregate these effects-along with a task's per-service load demand and model them via a single random variable, ranging over an arbitrary discrete probability distribution. Load models can be obtained via profiling tasks in isolation or simply by using an engineer's hypothesis about the system's projected behavior. The end-to-end performance requirements are posited in terms of throughput and delay constraints. Specifically, a pipeline's delay constraint is an upper bound on the total latency a computatation can accumulate, from input to output. The corresponding throughput constraint mandates the pipeline's minimum acceptable output rate-counting only outputs which meet their delay constraints. Since per-component loads can be generally distributed; and since resources host stages from multiple pipelines, meeting all of the system's end-to-end constraints is a nontrivial problem. Our approach involves solving two subproblems in tandem: 1) finding an optimal proportion of load to allocate to each task and channel and 2) deriving the best combination of service intervals over which all load proportions can be guaranteed. The design algorithms use analytic approximations to quickly estimate output rates and propagation delays for candidate solutions. When all parameters are synthesized, the estimated end-to-end performance metrics are rechecked by simulation. The per-component load reservations can then be increased, with the synthesis algorithms rerun to improve performance. At that point, the system can be configured according to the synthesized scheduling parameters-and then revalidated via on-line profiling. In this paper, we demonstrate our technique on an example system, and compare the estimated performance to its simulated on-line behavior.

Presents a performance-based methodology for designing a high-bandwidth radar application on commodity platforms. Unlike many real-time systems, our approach works for commodity processors running commodity operating systems. Our technique is innovative because it uses stochastic models of the processing time at each step in the process to allow for the variabilities of running on a non-real-time operating system. We show how our system synthesizes the runtime parameters for a synthetic aperture radar application under a variety of loading conditions.