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Chris S. Kellen

dblp:73/1485 · DBLP profile ↗
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3ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 95% Integrated circuit design · 5%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › design for manufacturability
wafer representation
0.021993
The CDB/HCDB semiconductor wafer representation server · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
A Semiconductor Wafer Representation Database and Its Use in the PREDITOR Process Editor and Statistical Simulator · DAC 1991
Electronic design automation › technology computer-aided design
statistical process simulation
0.011993
The CDB/HCDB semiconductor wafer representation server · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › yield analysis
yield simulation
0.011993
The CDB/HCDB semiconductor wafer representation server · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › technology computer-aided design
process and device simulation
0.011991
A Semiconductor Wafer Representation Database and Its Use in the PREDITOR Process Editor and Statistical Simulator · DAC 1991
Electronic design automation › technology computer-aided design
process simulation
0.011991
A Semiconductor Wafer Representation Database and Its Use in the PREDITOR Process Editor and Statistical Simulator · DAC 1991
Electronic design automation › circuit simulation › probabilistic simulation
statistical simulation
0.011991
A Semiconductor Wafer Representation Database and Its Use in the PREDITOR Process Editor and Statistical Simulator · DAC 1991

Methods — techniques the papers use, named apart from their topics

hierarchical database · 0.0attribute mechanism · 0.0analytical model · 0.0
YearPublicationVenuePosition
1998 MEMS fault model generation using CARAMEL
abstract
We have enhanced the process simulator CODEF (1996) into a tool called CARAMEL (Contamination And Reliability Analysis of MicroElectromechanical Layout) for analyzing the impact of contamination particles on the geometrical and material properties of microelectromechanical systems (MEMS). CARAMEL accepts as input a microelectromechanical layout, a particulate description, and a process recipe. CARAMEL produces a mesh description of the defective layout that is completely compatible with the electromechanical simulator ABAQUS (1995). Analysis of CARAMEL's output indicates that a wide range of defective structures are possible due to the presence of contaminations. Moreover, electromechanical simulations of CARAMEL's mesh representations of defective layout has revealed that a wide variety of faulty behaviors are associated with these defects. In this paper, we describe CARAMEL and its application to the development of realistic fault models for MEMS.
Abhijeet Kolpekwar, Chris S. Kellen, R. D. (Shawn) Blanton
ITC2
1993 The CDB/HCDB semiconductor wafer representation server
abstract
The chip database (CDB) and the hierarchical chip database (HCDB) and their uses in a wafer representation server are described. The server provides data types and methods for hierarchically representing the three-dimensional geometry and fields of a semiconductor wafer during process, device, and yield simulation. The basic database data types and the general attribute mechanism have been used to create database extensions. These extensions implement operations frequently used by process and device simulation models. The combination of the databases and extensions forms a CDB/HCDG server that greatly reduces the effort required to create new statistical process, device, and yield simulation models. Examples of using the server to implement new models are described. Performance data demonstrate that the server is fast enough for use by analytical models during statistical simulation of macrocells, and is able to meet the representation needs of numerical simulation.>
D. M. H. Walker, Chris S. Kellen, David M. Svoboda, Andrzej J. Strojwas
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1991 A Semiconductor Wafer Representation Database and Its Use in the PREDITOR Process Editor and Statistical Simulator
abstract
geometry and field Database (CDB), for representing the results of IC process and device simulation, and its use in the PREDITOR process editor and statistical simulator.Using fast analytical models, process simulation and device parameter extraction for a CMOS inverter takes 1.3sec on a DECstation 3100, with database access taking 14-34% of that time.
D. M. H. Walker, Chris S. Kellen, Andrzej J. Strojwas
DAC2