Demo Data from EDBT 2026 / reviewers in the wild / expert
Dongkeun Oh
dblp:73/2662
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 2012
0000-0002-9646-3485ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 67% Electronic design automation · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation › simulation › thermal simulation
3d thermal simulation |
0.1 | 1 | 2012 | Efficient Thermal Simulation for 3-D IC With Thermal Through-Silicon Vias · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012 |
Electronic design automation
physical design |
0.1 | 1 | 2012 | Efficient Thermal Simulation for 3-D IC With Thermal Through-Silicon Vias · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012 |
Performance modeling and evaluation › simulation
thermal simulation |
0.1 | 1 | 2012 | Efficient Thermal Simulation for 3-D IC With Thermal Through-Silicon Vias · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012 |
Methods — techniques the papers use, named apart from their topics
virtual power source method · 0.1green function-based analytical spectral method · 0.1finite difference method · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2012 | Efficient Thermal Simulation for 3-D IC With Thermal Through-Silicon ViasabstractA novel virtual power source (VPS) method is proposed that can significantly speedup 3-D integrated circuit (IC) thermal simulation with sparely deployed thermal TSVs leveraging Green function-based analytical spectral method. Specifically, it is shown that the impact of TSVs with nonhomogeneous thermal conductivity on thermal simulation may be modeled as VPSs located at mesh grids inside the thermal TSVs. Using this VPS model, the temperature distribution over the entire 3-D IC may be obtained by solving for the thermal distribution of a thermally homogeneous substrate in the presence of these VPSs. As such, the fast spectral method may be applied to accelerate the simulation. Significant (3–100 times) speedup over a baseline finite difference method implementation has been observed in preliminary simulations. Dongkeun Oh, Charlie Chung-Ping Chen, Yu Hen Hu |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2010 | Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processorsabstractTechnology scaling has allowed integration of multiple cores into a single die. However, high power consumption of each core leads to very high heat density, limiting the throughput of thermal-constrained multi-core processors. To maximize the throughput, various software-based dynamic thermal management and optimization techniques have been proposed, many of which depend on accurate temperature sensing of each core. However, the decision for dynamic thermal management and throughput optimization only based on the temperature of each core can result in less optimal throughput in certain circumstances according to our investigation. In this paper, we propose 1) a dynamic power estimation method using a single thermal sensor for each core in multi-core processors, 2) a die temperature reconstruction method using the estimated power, and 3) a throughput optimization method based the estimated power instead of the temperature. According to our experiment using 90nm technology, the proposed method results in less than 3% error in estimating power and hot-spot temperature of a multi-core processor. Furthermore, the proposed throughput optimization method based on the estimated power leads to up to 4% higher throughput than a temperature-based optimization method. Dongkeun Oh, Nam Sung Kim, Charlie Chung-Ping Chen, Azadeh Davoodi, Yu Hen Hu |
ASP-DAC | 1 |