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EDBT 2026 Demo / reviewers in the wild / expert

Edward G. Freedman

dblp:73/5709 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 44% Performance modeling and evaluation · 44% Memory systems · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › parallel system performance
multiprocessor performance evaluation		 0.011990
Perfect Benchmarks decomposition and performance on VAX multiprocessors · SC 1990
Parallel and multicore computing › parallelization strategies
parallel program decomposition		 0.011990
Perfect Benchmarks decomposition and performance on VAX multiprocessors · SC 1990
Memory systems
cache design		 0.011990
Perfect Benchmarks decomposition and performance on VAX multiprocessors · SC 1990
YearPublicationVenuePosition
1991 Efficient decomposition and performance of parallel PDE, FFT, Monte Carlo simulations, simplex, and Sparse solvers
Zarka Cvetanovic, Edward G. Freedman, Charles Nofsinger
 J. Supercomput.2
1990 Perfect Benchmarks decomposition and performance on VAX multiprocessors
abstract
The authors present the methods for decomposition and the performance of the Perfect Benchmark suite on two VAX multiprocessors. Results indicate that it was possible to obtain significant performance gains on both VAX multiprocessors, relative to a uniprocessor case. A methodology that can be applied to decompose other existing scientific and engineering applications is proposed. Guidelines for autodecomposing compiler improvements are provided. The authors discuss and quantify the effect of different cache designs on the multiprocessor performance.>
Zarka Cvetanovic, Edward G. Freedman, Charles Nofsinger
 SC2