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Mutsuko Wakabayashi

dblp:74/2232 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1988
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 53% High-performance computing · 32% Integrated circuit design · 16%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design
process simulation
0.011988
SMART-P: rigorous three-dimensional process simulator on a supercomputer · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
High-performance computing
scientific computing systems
0.011988
SMART-P: rigorous three-dimensional process simulator on a supercomputer · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Integrated circuit design
semiconductor device modeling
0.011988
SMART-P: rigorous three-dimensional process simulator on a supercomputer · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
High-performance computing › scientific computing systems
supercomputer simulation
0.011988
SMART-P: rigorous three-dimensional process simulator on a supercomputer · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988

Methods — techniques the papers use, named apart from their topics

generalized coordinate transformation · 0.0finite difference method · 0.0
YearPublicationVenuePosition
1988 SMART-P: rigorous three-dimensional process simulator on a supercomputer
abstract
A description is given of a three-dimensional process simulator, named SMART-P, that is based on the finite-difference approach to the supercomputer FACOM VP-100. To simulate the impurity redistribution and nonplanar structure in the Si/SiO/sub 2/ system, this simulator contains a three-dimensional oxidation model, an interaction model of impurities, a numerical model of interstitial-assisted oxidation-enhanced diffusion, and other process models. The numerical process modeling in the Si/SiO/sub 2/ system is described. The three-dimensional process modeling CAD (computer-aided design) has been realized by using efficient numerical algorithms based on the generalized coordinate transformation method. The capabilities of this simulator have been demonstrated in applications relating to both local oxidation of silicon (LOCOS) and trench-isolated 0.5 mu m MOSFET structures.>
Shinji Odanaka, Hiroyuki Umimoto, Mutsuko Wakabayashi, Hideya Esaki
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3