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Yanick Paviot

dblp:74/4302 · DBLP profile ↗
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3ranked-venue papers
0as first author
0since 2021 · last 2004
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 37% Embedded and real-time systems · 29% Electronic design automation · 16%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
chip multiprocessor
0.122004
Debugging HW/SW interface for MPSoC: video encoder system design case study · DAC 2004
Component-based design approach for multicore SoCs · DAC 2002
Embedded and real-time systems
component-based design
0.012002
Component-based design approach for multicore SoCs · DAC 2002
Electronic design automation
system-level design
0.012002
Component-based design approach for multicore SoCs · DAC 2002
Embedded and real-time systems
embedded system design
0.012004
Debugging HW/SW interface for MPSoC: video encoder system design case study · DAC 2004
Parallel and multicore computing › parallel programming models
message passing
0.012004
Debugging HW/SW interface for MPSoC: video encoder system design case study · DAC 2004
Parallel and multicore computing
parallel programming models
0.012004
Debugging HW/SW interface for MPSoC: video encoder system design case study · DAC 2004
Embedded and real-time systems › embedded system design
platform-based design
0.012004
Debugging HW/SW interface for MPSoC: video encoder system design case study · DAC 2004
Integrated circuit design
ASIC design
0.012002
Component-based design approach for multicore SoCs · DAC 2002

Methods — techniques the papers use, named apart from their topics

parallelization · 0.0hardware prototyping · 0.0MPI · 0.0wrapper generation · 0.0systemc · 0.0
YearPublicationVenuePosition
2004 Debugging HW/SW interface for MPSoC: video encoder system design case study
abstract
This paper reports a case study of multiprocessor SoC (MPSoC) design of a complex video encoder, namely OpenDivX. OpenDivX is a popular version of MPEG4. It requires massive computation resources and deals with complex data structures to represent video streams. In this study, the initial specification is given in sequential C code that had to be parallelized to be executed on four different processors. High level programming model, namely Message Passing Interface (MPI) was used to enable inter-task communication among parallelized C code. A four processor hardware prototyping platform was used to debug the parallelized software before final SoC hardware is ready. The targeting of abstract parallel code using MPI to the multiprocessor architecture required the design of an additional hardware-dependent software layer to refine the abstract programming model. The design was made by a team work of three types of designer: application software, hardware-dependent software and hardware platform designers. The collaboration was necessary to master the whole flow from the specification to the platform.The study showed that HW/SW interface debug was the most time-consuming step. This is identified as a potential killer for application-specific MPSoC design. To further investigate the ways to accelerate the HW/SW interface debug, we analyzed bugs found in the case study and the available debug environments. Finally, we address a debug strategy that exploits efficiently existing debug environments to reduce the time for HW/SW interface debug.
Mohamed-Wassim Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed Amine Jerraya
DAC4
2003 Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer
Sungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed Amine Jerraya
DATE4
2002 Component-based design approach for multicore SoCs
abstract
This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitives to build complex architectures from basic components. This bottom-up approach allows design-architects to explore efficient custom solutions with best performances. This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. The system specifications are represented as a virtual architecture described in a SystemC-like model and annotated with a set of configuration parameters. Our component-based design environment provides automatic wrapper-generation tools able to synthesize hardware interfaces, device drivers, and operating systems that implement a high-level interconnect API. This approach, experimented over a VDSL system, shows a drastic design time reduction without any significant efficiency loss in the final circuit.
Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava
DAC6