T. Shinsha

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2ranked-venue papers

2as first author

0since 2021 · last 1986

—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems

2 papers

Electronic design automation · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

Topic	Papers	Last	Evidence papers
Electronic design automation logic synthesis	2	1986	Incremental logic synthesis through gate logic structure identification · DAC 1986 Polaris: Polarity propagation algorithm for combinational logic synthesis · DAC 1984
Electronic design automation › logic synthesis incremental synthesis	1	1986	Incremental logic synthesis through gate logic structure identification · DAC 1986
Electronic design automation › logic synthesis combinational logic synthesis	1	1984	Polaris: Polarity propagation algorithm for combinational logic synthesis · DAC 1984
Electronic design automation physical design	1	1986	Incremental logic synthesis through gate logic structure identification · DAC 1986

Methods — techniques the papers use, named apart from their topics

gate matrix method · 0.0

Year	Publication	Venue	Position
1986	Incremental logic synthesis through gate logic structure identification abstract This paper describes incremental logic synthesis for supporting function logic changes in the physical design stage of digital systems. The incremental logic synthesis is distinguished from logic synthesis in the respect that it updates only gate logic components, which must be changed due to the function logic changes, in the physically optimized gate logic structure. For making the incremental logic synthesis feasible, a gate logic structure identification and editing system has been developed with a corresponding gate matrix method as its core. This system has greatly contributed to the increase in design efficiency of the very large computer series M68XH. T. Shinsha, T. Kubo, Y. Sakataya, J. Koshishita, Koichiro Ishihara	DAC	1
1984	Polaris: Polarity propagation algorithm for combinational logic synthesis T. Shinsha, T. Kubo, M. Hikosaka, K. Akiyama, Koichiro Ishihara	DAC	1