Demo Data from EDBT 2026 / reviewers in the wild / expert
Gianfranco R. Putzolu
dblp:74/6386
· DBLP profile ↗
14ranked-venue papers
2as first author
0since 2021 · last 1988
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 1 first-authorDatabases, data management, data science and information retrieval · 4Theory of computation · 4 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
7 papers |
Electronic design automation · 29% Memory systems · 26% Performance modeling and evaluation · 26% | |
| Databases, data mining, and information retrieval
3 papers |
Data integration and cleaning · 48% Transaction processing and concurrency control · 40% Database system architecture and tuning · 12% |
Topics — the 26 heaviest of 28, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Data integration and cleaning › interoperability › database interoperability
database management system integration |
0.0 | 1 | 1988 | High Performance SQL Through Low-Level System Integration · SIGMOD Conference 1988 |
Performance modeling and evaluation
cost modeling |
0.0 | 1 | 1987 | The 5 Minute Rule for Trading Memory for Disk Accesses and The 10 Byte Rule for Trading Memory for CPU Time · SIGMOD Conference 1987 |
Memory systems › memory hierarchy
memory hierarchy management |
0.0 | 1 | 1987 | The 5 Minute Rule for Trading Memory for Disk Accesses and The 10 Byte Rule for Trading Memory for CPU Time · SIGMOD Conference 1987 |
Storage systems › buffer management
buffer cache management |
0.0 | 1 | 1988 | High Performance SQL Through Low-Level System Integration · SIGMOD Conference 1988 |
Storage systems › i/o architecture › i/o subsystem
disk access |
0.0 | 1 | 1987 | The 5 Minute Rule for Trading Memory for Disk Accesses and The 10 Byte Rule for Trading Memory for CPU Time · SIGMOD Conference 1987 |
Database system architecture and tuning
relational database system |
0.0 | 1 | 1976 | System R: Relational Approach to Database Management · ACM Trans. Database Syst. 1976 |
Electronic design automation
hardware verification and test |
0.0 | 2 | 1971 | A Heuristic Algorithm for the Testing of Asynchronous Circuits · IEEE Trans. Computers 1971 Algorithms for Detection of Faults in Logic Circuits · IEEE Trans. Computers 1971 |
Electronic design automation › hardware verification and test
test generation |
0.0 | 2 | 1971 | A Heuristic Algorithm for the Testing of Asynchronous Circuits · IEEE Trans. Computers 1971 Algorithms for Detection of Faults in Logic Circuits · IEEE Trans. Computers 1971 |
Transaction processing and concurrency control
concurrency control |
0.0 | 1 | 1975 | Granularity of Locks in a Large Shared Data Base · VLDB 1975 |
Transaction processing and concurrency control › concurrency control
locking |
0.0 | 1 | 1975 | Granularity of Locks in a Large Shared Data Base · VLDB 1975 |
Transaction processing and concurrency control › concurrency control › locking
lock modes |
0.0 | 1 | 1975 | Granularity of Locks in a Large Shared Data Base · VLDB 1975 |
Transaction processing and concurrency control › concurrency control › locking
multi-granularity locking |
0.0 | 1 | 1975 | Granularity of Locks in a Large Shared Data Base · VLDB 1975 |
Electronic design automation
logic synthesis |
0.0 | 3 | 1965 | Average Values of Quantities Appearing in Multiple Output Boolean Minimization · IEEE Trans. Electron. Comput. 1965 Statistical Complexity of Algorithms for Boolean Function Minimization · J. ACM 1965 Average Values of Quantities Appearing in Boolean Function Minimization · IEEE Trans. Electron. Comput. 1964 |
Electronic design automation › hardware verification and test
asynchronous circuit testing |
0.0 | 1 | 1971 | A Heuristic Algorithm for the Testing of Asynchronous Circuits · IEEE Trans. Computers 1971 |
Electronic design automation › hardware verification and test
fault simulation |
0.0 | 1 | 1971 | Algorithms for Detection of Faults in Logic Circuits · IEEE Trans. Computers 1971 |
Electronic design automation › logic synthesis › logic minimization
boolean function minimization |
0.0 | 2 | 1965 | Statistical Complexity of Algorithms for Boolean Function Minimization · J. ACM 1965 Average Values of Quantities Appearing in Boolean Function Minimization · IEEE Trans. Electron. Comput. 1964 |
Electronic design automation › logic synthesis
two-level logic minimization |
0.0 | 2 | 1965 | Average Values of Quantities Appearing in Multiple Output Boolean Minimization · IEEE Trans. Electron. Comput. 1965 Average Values of Quantities Appearing in Boolean Function Minimization · IEEE Trans. Electron. Comput. 1964 |
Database system architecture and tuning
data independence |
0.0 | 1 | 1976 | System R: Relational Approach to Database Management · ACM Trans. Database Syst. 1976 |
Authentication and access control
authorization |
0.0 | 1 | 1976 | System R: Relational Approach to Database Management · ACM Trans. Database Syst. 1976 |
Embedded and real-time systems › real-time scheduling
complexity analysis |
0.0 | 1 | 1965 | Statistical Complexity of Algorithms for Boolean Function Minimization · J. ACM 1965 |
Electronic design automation › logic synthesis › logic minimization
multiple output minimization |
0.0 | 1 | 1965 | Average Values of Quantities Appearing in Multiple Output Boolean Minimization · IEEE Trans. Electron. Comput. 1965 |
Electronic design automation › logic synthesis
prime implicant generation |
0.0 | 1 | 1965 | Statistical Complexity of Algorithms for Boolean Function Minimization · J. ACM 1965 |
Automata and formal languages
formal grammars |
0.0 | 1 | 1964 | On a Family of Linear Grammars · Inf. Control. 1964 |
Automata and formal languages › formal grammars
linear grammars |
0.0 | 1 | 1964 | On a Family of Linear Grammars · Inf. Control. 1964 |
Automata and formal languages
regular languages |
0.0 | 1 | 1965 | Generalizations of Regular Events · Inf. Control. 1965 |
Electronic design automation › hardware verification and test
sequential circuit testing |
0.0 | 1 | 1971 | Algorithms for Detection of Faults in Logic Circuits · IEEE Trans. Computers 1971 |
Methods — techniques the papers use, named apart from their topics
transaction journaling · 0.0locking · 0.0SQL optimization · 0.0economic cost modeling · 0.0system design · 0.0architecture description · 0.0mccluskey's method · 0.0macroblock test generation · 0.0iterative test generation · 0.0d-notation · 0.0d-algorithm · 0.0combinatorial analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1988 | High Performance SQL Through Low-Level System IntegrationabstractNonStop SQL [TM] achieves high performance through an implementation which integrates SQL record access with the pre-existing disk I/O and transaction management subsystems, and moves SQL function downward from the client to the server level of these subsystems. System integration and movement of function to the server reduce message traffic and CPU consumption by putting SQL optimizations at the lower levels of the system. Examples of such optimizations are message traffic savings by filtering data and applying updates at the data source, I/O savings by SQL-optimized buffer pool management, and locking and transaction journaling techniques which take advantage of SQL semantics. Achieving message traffic reduction is particularly important in a distributed, non shared-memory architecture such as the Tandem NonStop System. The result of this implementation is an SQL system which matches the performance of the pre-existing DBMS, while inheriting such pre-existing architecturally-derived features as high availability, transaction-based data integrity, and distribution of both data and execution. Andrea J. Borr, Gianfranco R. Putzolu |
SIGMOD Conference | 2 |
| 1987 | The 5 Minute Rule for Trading Memory for Disk Accesses and The 10 Byte Rule for Trading Memory for CPU TimeabstractABSTRACT: If an item is accessed frequently enough, it should be main memory resident. For current technology, "frequently enough " means about every five minutes. Along a similar vein, one can frequently trade memory space for cpu trme. For example, bits can be packed in a byte at the expense of extra instructions to extract the bits. It makes economic sense to spend ten bytes of main memory to save one lnstructlon per second. These results depend on current price ratios of processors, memory and disc accesses These ratios are changing and Jim Gray 0001, Gianfranco R. Putzolu |
SIGMOD Conference | 2 |
| 1976 | System R: Relational Approach to Database ManagementabstractSystem R is a database management system which provides a high level relational data interface. The systems provides a high level of data independence by isolating the end user as much as possible from underlying storage structures. The system permits definition of a variety of relational views on common underlying data. Data control features are provided, including authorization, integrity assertions, triggered transactions, a logging and recovery subsystem, and facilities for maintaining data consistency in a shared-update environment. This paper contains a description of the overall architecture and design of the system. At the present time the system is being implemented and the design evaluated. We emphasize that System R is a vehicle for research in database architecture, and is not planned as a product. Morton M. Astrahan, Mike W. Blasgen, Donald D. Chamberlin, Kapali P. Eswaran, Jim Gray 0001, Patricia P. Griffiths, W. Frank King III, Raymond A. Lorie, Paul R. McJones, James W. Mehl, Gianfranco R. Putzolu, Irving L. Traiger, Bradford W. Wade, Vera Watson |
ACM Trans. Database Syst. | 11 |
| 1975 | Granularity of Locks in a Large Shared Data BaseabstractThis paper proposes a locking protocol which associates locks with sets of resources. This protocol allows simultaneous locking at various granularities by different transactions. It is based on the introduction of additional lock modes besides the conventional share mode and exclusive mode. The protocol is generalized from simple hierarchies of locks to directed acyclic graphs of locks and to dynamic graphs of locks. The issues of scheduling and granting conflicting requests for the same resource are then discussed. Lastly, these ideas are compared with the lock mechanisms provided by existing data management systems. Jim Gray 0001, Raymond A. Lorie, Gianfranco R. Putzolu, Irving L. Traiger |
VLDB | 3 |
| 1971 | Algorithms for Detection of Faults in Logic CircuitsabstractProgrammed algorithms for test generation and test evaluation are described. The D-notation is introduced and a test generator (DALG) for combinational logic is presented. The sequential case is then examined. "Real life" constraints related to LSI testing are discussed. Two heuristic test generators satisfying these constraints are introduced. The iterative test generator (ITG) generates tests by transforming the given sequential circuit into an iterative combinational circuit. The macroblock test generator (MTG) uses the same approach but makes use of complex primitives (latches, triggers, etc.) to represent the circuit to be tested. Both the ITG and the MTG are not always guaranteed to generate good tests for each examined failure, and are used in connection with a test evaluator (simulator). Basic features of this evaluator are discussed. Willard G. Bouricius, Edward P. Hsieh, Gianfranco R. Putzolu, J. Paul Roth, Peter R. Schneider, Chung-Jen Tan |
IEEE Trans. Computers | 3 |
| 1971 | A Heuristic Algorithm for the Testing of Asynchronous CircuitsabstractThis paper describes an algorithm for the computation of tests to detect failures in asynchronous sequential logic circuits. It is based upon an extension of the D-algorithm [1]. Discussion of experience with a program of the procedure is given. Gianfranco R. Putzolu, J. Paul Roth |
IEEE Trans. Computers | 1 |
| 1968 | Frequency of Decomposability among Machines with a Large Number of States
David E. Muller, Gianfranco R. Putzolu |
J. Comput. Syst. Sci. | 2 |
| 1968 | Probabilistic Aspects of Machine Decomposition Theory
Gianfranco R. Putzolu |
J. Comput. Syst. Sci. | 1 |
| 1966 | Corrigenda: "Statistical Complexity of Algorithms for Boolean Function Minimization"abstractNo abstract available. Franco Mileto, Gianfranco R. Putzolu |
J. ACM | 2 |
| 1965 | Generalizations of Regular Events
V. Amar, Gianfranco R. Putzolu |
Inf. Control. | 2 |
| 1965 | Statistical Complexity of Algorithms for Boolean Function MinimizationabstractThe first problem in a two level Boolean minimization is the determination of the prime k -cubes. This paper is concerned with the estimation of the statistical complexity of some well-known algorithms which solve this problem. Formulas are given for the average number of comparison operations among k -cubes occurring in Quine's method and in Mc-Cluskey's method; these quantities provide indications of the average execution time of computer programs based on the corresponding algorithms. Numerical values are given and commented on. Formulas are also obtained for the variance of the number of k -cubes and the variance of the number of cubes of a Boolean function; in fact the calculation of these quantities is strictly related to that of the average number of comparison operations among k -cubes. These variances give an idea of the probable error made by using the corresponding average values (obtained in a previous paper by the authors) to make forecasts. It turns out that this error is quite small. Franco Mileto, Gianfranco R. Putzolu |
J. ACM | 2 |
| 1965 | Average Values of Quantities Appearing in Multiple Output Boolean MinimizationabstractIn connection with the problem of two-level minimization of systems of Boolean functions, formulas are obtained for the following statistical quantities: average number of k cubes, prime k cubes, and essential k cubes of a system of Boolean functions. The parameters appearing in the formulas are the number of variables, the number of functions of the system, and the number of ``one'' vertices of each function. Numerical evaluations are given. Increasing by one the number of variables n of a system of m functions roughly results in multiplying the average numbers of cubes and prime cubes by a factor of about 2.2 to 2.3. The ratio of the average numbers of essential cubes and prime cubes rapidly decreases increasing n or m, so that the minimization algorithms, which obtain the essential cubes before the prime cubes, seem statistically unsuitable to solve ``large'' minimization problems. The average occupation memory occurring in Quine, McCluskey, and Bartee algorithms is also evaluated. Its rate of increase with the number of variables is about 2.5. Franco Mileto, Gianfranco R. Putzolu |
IEEE Trans. Electron. Comput. | 2 |
| 1964 | On a Family of Linear Grammars
V. Amar, Gianfranco R. Putzolu |
Inf. Control. | 2 |
| 1964 | Average Values of Quantities Appearing in Boolean Function MinimizationabstractIn connection with the problem of two-level minimization of Boolean functions, we have obtained in a combinatorial way the formulas which give the following quantities of statistical interest: average numbers of k cubes, prime k cubes and essential k cubes of a Boolean function. The parameters which appear in our formulas are: number of variables, number of ``one'' vertices and number of ``don't care'' vertices. Franco Mileto, Gianfranco R. Putzolu |
IEEE Trans. Electron. Comput. | 2 |