In this paper, we present two charge pump architectures for nonvolatile memories with dynamic biasing of the gate and the body voltages. By controlling the gate and the body voltage of each pass-transistor, the voltage loss due to the device threshold is removed and the charge is pumped from one stage to the following with a negligible voltage drop and large conductivity. The charge pumps were fabricated in the ST 130-nm digital standard CMOS technology. Compared to conventional charge pumps, larger output voltage and better power efficiency are achieved still retaining a simple two-phase clocking scheme. Measurements performed on four-stage and eight-stage charge pumps are provided.

A new charge pump circuit is presented: it is based on PMOS pass transistors with dynamic control of the gate and body voltages. By controlling the gate and the bulk of each pass-transistor, the voltage loss due to the device threshold is removed and the charge is pumped from one stage to the other with negligible voltage drop. Compared to conventional charge pumps, it exhibits a larger output voltage and better power efficiency still retaining a simple two-phase clocking scheme. The architecture is based on low-voltage transistors and the voltage drop among the device terminals does not exceed the supply voltage. Measurements performed on a 4-stage charge pump, fabricated exploiting a ST 130nm CMOS process, are provided.

This paper presents the successful design of a CMOS operational amplifier with enhanced immunity to electromagnetic interferences. Thanks to its strongly symmetrical topology, the amplifier exhibits an intrinsic robustness to interferences arising from a wide class of sources. Such a scheme, for the first time in the authors' knowledge, proves the effectiveness of symmetrical topologies to minimize the effects of electromagnetic interferences in operational amplifiers. The amplifier architecture is based on 2 identical stages: 2 fully differential source cross-coupled amplifiers with active loads. The circuit was fabricated in a 0.8 /spl mu/m n-well CMOS technology (AMS CYE process). Experimental results, in terms of EMI immunity, are presented and compared with a commercial amplifier. They show a low susceptibility to EMI conveyed both to the input and the power pins. The EMI effects on the proposed amplifier are reduced by more than one order of magnitude, compared to a commercial amplifier. Furthermore the amplifier overall measured performances are provided along with the corresponding simulation results.

In this paper the experimental chaotic behavior of the well known 741 operational amplifier is presented when electromagnetic interference is conveyed to its power supply pins. Such a complex dynamic behavior occurs if the interfering signal is in the 5 MHz-28 MHz range with amplitudes greater than about 100 mV. These frequencies are out of the standard operating conditions, but they easily occur in real applications as a result of interference. The chaotic behavior was measured on 741 amplifiers of three different manufacturers and it was also verified by simulation of an equivalent circuit described in the literature. The strong similarities between simulation and measurements argue that the chaotic behavior is a property of the amplifier circuit architecture and it is not an effect of the package or due to the experimental setup.

An effective fingerprint verification system is presented. It assumes that an existing reference fingerprint image must validate the identity of a person by means of a test fingerprint image acquired online and in real-time using minutiae matching. The matching system consists of two main blocks: The first allows for the extraction of essential information from the reference image off-line, the second performs the matching itself online. The information is obtained from the reference image by filtering and careful minutiae extraction procedures. The fingerprint identification is based on triangular matching to cope with the strong deformation of fingerprint images due to static friction or finger rolling. The matching is finally validated by dynamic time warping. Results reported on the NIST Special Database 4 reference set, featuring 85 percent correct verification (15 percent false negative) and 0.05 percent false positive, demonstrate the effectiveness of the verification technique.

An expression in closed form is derived for the recognition error vs. rejection rate of optical character or word recognition systems. This expression allows to define a lower bound for the error rate of any recognition system employing a rejection process based on the definition of a confidence threshold. This relation has also proved to be useful to make a quantitative comparison between two confidence computation methods implemented in a system for reading USA Census '90 hand-written forms. The newly proposed method is based upon a confidence model integrating single-character confidence levels, digram statistics and other information from the dictionary matching phase. At a 50% rejection rate, the field error rate calculated using the new confidence computation algorithm decreased from 47.7% to 44.6%, which represents a considerable improvement, given a theoretical lower bound of 40.8% on the error rate.

In this paper a system is presented which is used to read low quality machine-printed characters. It is used to read computer printouts when the data file is not available. The assumptions on the characters are that their font belongs to a set of known fonts and that they are organized into tables or columns. Usually, the printer used for these documents is fast and the printing quality is low, due to the used up inked ribbon and to damaged nozzles or print head. Hence standard machine-printed OCR systems feature about 15% error rate on these sheets, a specific technique is needed. In order to cope with the recognition of broken characters and character pieces, the system is based on a two step strategy. First, it tries to match the unknown character using a moving-window technique. Then, if this fails, it creates a new reference image set using the already recognized characters of the document and repeats the first matching step. Thus, the correlation among damaged characters is used. The first step allows to reach a 2% error rate and the application of the second step lowers it to 0.15%. This low error rate is possible thanks to the ability of the system to adapt its behavior to the damaged characters produced by the printer. The average recognition time on a SUN SparcStation 10 is 15 ms/character, computed on about 100000 characters contained in 50 documents.

In applications of character recognition where machine-printed and hand-written characters are involved, it is important to know if the character image, or the whole word, is machine- or hand-written. This is due to the accuracy difference between the algorithms and systems oriented to machine- or handwritten characters. Obviously, this type of knowledge leads to the increase of the overall system quality. In this work a classification system is presented which reads a raster image of a character and outputs two confidence values, one for "machine-written" and one for "hand-written" character classes, respectively. The proposed system features a preprocessing step, which transforms a general uncentered character image into a normalized form, then the feature extraction phase extracts relevant information from the image, and at the end, a standard classifier based on a feedforward neural network creates the final response. At the end, some results on a proprietary image database are reported.

A specifically designed recognition system is presented for reading the Industry or Employer section of the Official 1990 U.S. Census form. This system was a participant in the 2nd Census OCR Systems Conference, organised by the U.S. Bureau of Census and the National Institute of Standards and Technology. It handles the complete reading task starting from the scanned raster image of the form arriving to an ASCII string containing what was written in the fields of the original form. The system is based on several building blocks, connected in a suitable way. In particular, the main operations of the recognition engine are: form identification, field isolation and bounding box removal, field and blob segmentation, broken character joining, isolated character recognition, word building, dictionary correction and finally, hypothesis and confidence generation. Each processing step is described an detail. Results on the NIST Special Database 13 are also reported.

A simple form of cooperation between the k-nearest neighbors (NN) approach to classification and the neural-like property of adaptation is explored. A tunable, high level k-nearest neighbors decision rule is defined that comprehends most previous generalizations of the common majority rule. A learning procedure is developed that applies to this rule and exploits those statistical features that can be induced from the training set. The overall approach is tested on a problem of handwritten character recognition. Experiments show that adaptivity in the decision rule may improve the recognition and rejection capability of standard k-NN classifiers.

Classifiers based on the k-nearest neighbors (k-NN) approach have recently received an increasing attention because of their simple implementation and absence of training. In this technique, the similarity measure used to compute the distance between the stored patterns and the test element is the most crucial part of the method. The paper addresses this issue within the context of recognition of hand-written digits. A novel similarity measure is proposed and used to associate a number to each pair of samples in a suitable N-dimensional space in order to define the distance between two handwritten characters. The proposed similarity measure has been parameterized and the best values of these parameters have been evaluated using suitable statistical approaches. Finally, some results obtained from the classification of digits extracted from a ZIP code database are provided.>

A finite difference boundary fitted grid-generation method for composite and complicated geometries is described. In each region belonging to the domain of interest, a set of points is defined by differential transformation from a regular computational space, maintaining the continuity of coordinate lines crossing the internal boundaries. The definition of the relationship between the nodes yields a finite element mesh. Both the mathematical basis and the algorithmic implementation are shown, followed by an example of application to a realistic semiconductor device.>