Demo Data from EDBT 2026 / reviewers in the wild / expert
Keiji Ishikawa
dblp:75/3023
· DBLP profile ↗
3ranked-venue papers
1as first author
0since 2021 · last 1996
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 2 · 1 first-authorComputer networks · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
1 paper |
Internet architecture and protocols · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Distributed systems · 100% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Internet architecture and protocols
ATM networks |
0.0 | 1 | 1993 | Distributed Multilink System for Very-High-Speed Data Link Control · IEEE J. Sel. Areas Commun. 1993 |
Internet architecture and protocols
broadband network |
0.0 | 1 | 1993 | Distributed Multilink System for Very-High-Speed Data Link Control · IEEE J. Sel. Areas Commun. 1993 |
Internet architecture and protocols
link-layer protocols |
0.0 | 1 | 1993 | Distributed Multilink System for Very-High-Speed Data Link Control · IEEE J. Sel. Areas Commun. 1993 |
Internet architecture and protocols › link-layer protocols
multilink protocol |
0.0 | 1 | 1993 | Distributed Multilink System for Very-High-Speed Data Link Control · IEEE J. Sel. Areas Commun. 1993 |
Methods — techniques the papers use, named apart from their topics
resequencing algorithm · 0.0performance evaluation · 0.0distributed algorithm · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1996 | Rapid protocol prototyping from message sequence chart based specificationabstractThis paper reports a prototyping system which can evaluate the performance of the message sequence chart based protocol described in SAL after compiling and downloading the SAL description into the newly developed adapter board built in a workstation. Experimental results show rapid evaluation of the layer 2 protocols such as LAPD and SSCOP in a real environment. Keiji Ishikawa, Tamio Hoshino |
RSP | 1 |
| 1996 | Real-time Emulation Method for ATM Switching Systems in Broadband ISDNabstractThis paper describes a real-time emulation method based on the use of commercial FPGAs, high-speed interconnect switch devices and software tools (gate array LSI to/from FPGA netlist migration and multi-FPGA partitioning tools) to emulate large scale high-speed communication switching system without the need for conventional specific wiring structures between FPGAs and timing control circuit insertion. This method is applied to line interface units (LUs) that have 20 MHz operation; we employ the LU board and emulation boards, both of which have hierarchical structures with small sub-boards. The proposed LU board structure has the advantage of utilizing a common LU board for rapid prototyping as well as developing cost effective, practical high-performance Asynchronous Transfer Mode (ATM) switching systems for broadband ISDN (Integrated Services Digital Networks). The results of multiple FPGA partitioning on the emulation board suggest that the proposed method will yield economic systems that are also practical. Tsuneo Matsumura, Naoaki Yamanaka, Ryoichi Yamaguchi, Keiji Ishikawa |
RSP | 4 |
| 1993 | Distributed Multilink System for Very-High-Speed Data Link ControlabstractA protocol control system architecture that provides very high processing performance for gigabit-per-second data communication in a broadband network is described. The architecture connects protocol controllers in parallel and uses a distributed multilink method that features a distributed algorithm for allocating transmission on the transmitting side and a resequencing algorithm on the receiving side. The system performance and the influence of transmission errors caused by cell loss in an asynchronous transfer mode network are evaluated. It is shown that by reducing each controller's distributing overhead, the system increases throughput up to 90 times that achieved when using a single controller.> Takeshi Akaike, Keiji Ishikawa, Koichi Saito, Michiharu Mito |
IEEE J. Sel. Areas Commun. | 2 |