Demo Data from EDBT 2026 / reviewers in the wild / expert
C. Eswaran
dblp:75/4152
· DBLP profile ↗
5ranked-venue papers
0as first author
0since 2021 · last 2000
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 2Graphics, computer vision, multimedia, augmented reality and games · 2Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
2 papers |
Image and video coding · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Image and video coding › image compression › lossy image compression
block truncation coding |
0.0 | 2 | 1996 | New bit rate reduction techniques for block truncation coding · IEEE Trans. Commun. 1996 A new algorithm for BTC image bit plane coding · IEEE Trans. Commun. 1995 |
Image and video coding
bit rate reduction |
0.0 | 1 | 1996 | New bit rate reduction techniques for block truncation coding · IEEE Trans. Commun. 1996 |
Image and video coding
bit-plane coding |
0.0 | 1 | 1995 | A new algorithm for BTC image bit plane coding · IEEE Trans. Commun. 1995 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1994 | An Optimization Technique for the Design of Multiple Valued PLA's · IEEE Trans. Computers 1994 |
Electronic design automation › logic synthesis
multiple-valued logic synthesis |
0.0 | 1 | 1994 | An Optimization Technique for the Design of Multiple Valued PLA's · IEEE Trans. Computers 1994 |
Electronic design automation › logic synthesis › programmable logic array
programmable logic array design |
0.0 | 1 | 1994 | An Optimization Technique for the Design of Multiple Valued PLA's · IEEE Trans. Computers 1994 |
Methods — techniques the papers use, named apart from their topics
block truncation coding algorithms · 0.0lookup table · 0.0output encoding · 0.0literal circuit minimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2000 | On the choice of the wavelets for ECG data compressionabstractThis paper presents a technique used to choose optimal wavelets for electrocardiogram (ECG) signal data compression. At present, it is not clear which wavelet function is suitable for data compression of ECG signals. An important issue is that the performance of wavelet based algorithms may depend on the particular basis chosen for the signal compression. Various criteria are used to evaluate the fidelity of the reconstruction. The percent root difference (PRD) has been widely used in the literature as the principal error criterion. In this paper, three more criteria are used, namely, signal to noise ratio (SNR), distortion (D), and root mean square error (RMSE). We use a multiwavelet system that can simultaneously provide perfect reconstruction while preserving length (orthogonality), good performance at boundaries (via linear-phase symmetry), and high order of approximation (vanishing moments). Experimental results are shown for both multiwavelets and scalar wavelets. Rosli Besar, C. Eswaran, S. Shahrin, R. J. Simpson |
ICASSP | 2 |
| 1996 | New bit rate reduction techniques for block truncation codingabstractTwo simple and fast block truncation coding algorithms which require reduced bit rates are presented in this paper. The proposed algorithms are compared with the modified block truncation coding technique (MBTC) with regard to the mean square error (MSE), bit rates and subjective quality of the reconstructed images. It is found that the results obtained with the proposed algorithms at reduced bit rates are comparable to those obtained with the MBTC. Further, it is shown that one of the proposed algorithms yields results which are comparable to those achieved with more complex hybrid algorithms. Y. V. Ramana Rao, C. Eswaran |
IEEE Trans. Commun. | 2 |
| 1995 | A new algorithm for BTC image bit plane codingabstractA new look-up table technique for the coding of the block truncated image bit plane is presented which yields better images in the subjective as well as in the mean square sense compared to the one proposed by Mitchell and Delp (1980).> Y. V. Ramana Rao, C. Eswaran |
IEEE Trans. Commun. | 2 |
| 1994 | An Optimization Technique for the Design of Multiple Valued PLA'sabstractAn optimization technique for the design of two types of multiple-valued PLAs is described. In a type-I PLA, the multiple-valued function is realized directly, whereas in a type-II PLA, output encoding is used to encode the binary output of the PLA. In both types, multiple function literal circuits are used for the purpose of minimization. It is shown that the proposed technique leads to a considerably reduced size of PLA when compared to the earlier techniques.> Vijayan K. Asari, C. Eswaran |
IEEE Trans. Computers | 2 |
| 1988 | New GIC digital filter structures and their characteristicsabstractDigital filter structures based on the concept of a generalized emittance converter (GIC) are proposed. These structures are shown to possess better sensitivity and noise properties than known GIC structures. The comparison study is carried out using different types of sensitivity and noise measures.> K. Manivannan, C. Eswaran |
ICASSP | 2 |