The overview-detail design pattern, characterized by an overview of multiple items and a detailed view of a selected item, is ubiquitously implemented across software interfaces. Designers often try to account for all users, but ultimately these interfaces settle on a single form. For instance, an overview map may display hotel prices but omit other user-desired attributes. This research instead explores the malleable overview-detail interface, one that end-users can customize to address individual needs. Our content analysis of overview-detail interfaces uncovered three dimensions of variation: content, composition, and layout, enabling us to develop customization techniques along these dimensions. For content, we developed Fluid Attributes, a set of techniques enabling users to show and hide attributes between views and leverage AI to manipulate, reformat, and generate new attributes. For composition and layout, we provided solutions to compose multiple overviews and detail views and transform between various overview and overview-detail layouts. A user study on our techniques implemented in two design probes revealed that participants produced diverse customizations and unique usage patterns, highlighting the need and broad applicability for malleable overview-detail interfaces.

With the active development of IES in standards since the mid-2010s, the society has made considerable progress with multiple standards’ developments. This paper presents the results of engaging in standards’ development within and across borders of an IEEE society. In particular, the hands-on INTEROP Plugfests, coupled with the CoEs, provide platforms to create ideas for standards, develop standards, initiate interoperability among multiple vendors, providing competitive time-to-market advantage for involved industry partners.

Storage arrays are widely used in integrated biosensor systems to store detected signals before and after they are processed. As integrated biosensor systems often require very low power consumption to extend battery life and to maintain low cost, power consumption for storage arrays in integrated biosensor systems should be kept low, whereas the speed requirement is usually not high such that state-of-the-art IC technology is not usually needed. This paper presents the results of our investigation of designing low power memory structures in sub 1-V operation with high reliability for biosensor systems. Rather than using the state-of-the-art 45nm/32nm technology, 0.18 um CMOS technology is used for the design to keep the overall cost down while achieving read and write performance of 200MHz cycle rate. The results show that the use of body back bias in systems with low supply voltage can improve memory's static noise margin (SNM) and memory write performance by as much as 25%.