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E. Tammaru

dblp:75/815 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 77% Embedded and real-time systems · 23%

Topics — the 1 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
debugging support
0.011982
Guidelines for Creating a Debuggable Processor · ASPLOS 1982

Methods — techniques the papers use, named apart from their topics

hardware tracing · 0.0
YearPublicationVenuePosition
1982 Guidelines for Creating a Debuggable Processor
abstract
Hardware without software is of little use. Systems that ease the task of debugging software reduce cost and speed development. This paper presents guidelines for designing processors that ease debugging for real-time computer systems. Special hardware can aid the debugging process by tracing execution and accesses to memory. Such hardware requires access to signals that may not be readily available. Other, less exotic hardware provides an interface to the programmer and other processors. The hardware and software of the debugging system should not alter the real-time characteristics of the system under test and should be able to operate on a field-grade processor. It is undesirable to require special versions of processor hardware and software for the debugging system.
Robert E. McLear, D. M. Scheibelhut, E. Tammaru
ASPLOS3