Demo Data from EDBT 2026 / reviewers in the wild / expert
Anand Panyam
dblp:75/838
· DBLP profile ↗
7ranked-venue papers
1as first author
0since 2021 · last 1996
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 7 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 100% | |
| Theoretical computer science
1 paper |
Algorithms and data structures · 50% Graph algorithms and graph theory · 50% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › physical design › routing › channel routing
over-the-cell routing |
0.0 | 2 | 1996 | Optimal algorithms for planar over-the-cell routing problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996 A Unified Approach to Multilayer Over-the-Cell Routing · DAC 1994 |
Electronic design automation
physical design |
0.0 | 2 | 1996 | Optimal algorithms for planar over-the-cell routing problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996 A Unified Approach to Multilayer Over-the-Cell Routing · DAC 1994 |
Algorithms and data structures
dynamic programming |
0.0 | 1 | 1996 | Optimal algorithms for planar over-the-cell routing problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996 |
Graph algorithms and graph theory › planar graphs
maximum planar subset |
0.0 | 1 | 1996 | Optimal algorithms for planar over-the-cell routing problems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996 |
Electronic design automation › physical design › routing
multilayer routing |
0.0 | 1 | 1994 | A Unified Approach to Multilayer Over-the-Cell Routing · DAC 1994 |
Electronic design automation › physical design
routing |
0.0 | 1 | 1994 | A Unified Approach to Multilayer Over-the-Cell Routing · DAC 1994 |
Methods — techniques the papers use, named apart from their topics
parallel algorithm · 0.0dynamic programming · 0.0approximation algorithm · 0.0unified routing approach · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1996 | Optimal algorithms for planar over-the-cell routing problemsabstractIn this paper, we consider the two row maximum planar subset (TRMPS) problem in over-the-cell routing. The TRMPS problem requires selection of the maximum planar subset of nets, which can be routed between two rows of terminals in a cell row. This problem was first encountered by Gong, Liu, and Preas (1990). They stated the complexity of this problem to be unknown, and presented a min {1,k/d(S)} approximation algorithm, where k is the number of tracks available over the cell area and d(S) is the density of a solution S. We show that TRMPS problem can be solved optimally in polynomial time. We present a O(kn/sup 2/) dynamic programming algorithm for the TRMPS problem, where n is the number of nets. We also present a parallel version of our algorithm, which has a complexity of O(kn). Our algorithm can also be extended to solve the TRMPS problem, in the presence of prerouted nets, a chosen subset of nets, as well as for planar channel routing. We also apply our technique to obtain a 0.5 approximation, for over the cell routing in middle terminal model, thus improving the best known existing algorithm. The weighted version of the TRMPS problem, as well as, all the extensions can also be solved in O(kn/sup 2/) time. Srinivasa R. Danda, Sreekrishna Madhwapathy, Anand Panyam, Naveed A. Sherwani, Ioannis G. Tollis |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 1994 | A Unified Approach to Multilayer Over-the-Cell RoutingabstractSeveral Ov er-the-Cell (OTC) routing algorithms have been proposed for two and three layer processes.All the existing OTC routers can be used only on the cell models for whic h they were developed for.In this paper, we develop a uni ed approach t o m ulti-layer routing, motiv ated by o v er-the-cell routing, which can be used for full-custom la youts.Our approac h can also be directly applied to standard cell layouts, irrespective of the cell model used in the design.Our router has been implemen ted in C and tested on industrial benchmarks, suc h as PRIMARY I and PRIMARY I I , for which it obtained channel-less layouts. Sreekrishna Madhwapathy, Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam |
DAC | 4 |
| 1994 | An optimal algorithm for maximum two planar subset problem [VLSI layout]abstractThe Two Row Maximum Planar Subset (TRMPS) problem asks for finding the maximum planar subset of nets, that can be routed between two rows of terminals an a cell row. This problem was first encountered by Gong, Liu, and Preas (1990). They declared it open, and presented an approximation algorithm for this problem. In this paper we show that TRMPS problem can be solved optimally in polynomial time, and we present an O(kn/sup 2/) algorithm to solve this problem. Our algorithm can also be extended to solve the TRMPS problem, in the presence of pre-routed nets, a chosen subset of nets, as well as for planar channel routing. We also apply our technique to obtain an improved approximation algorithm, for over the cell routing in middle terminal model standard cell layouts.> Anand Panyam, Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani |
Great Lakes Symposium on VLSI | 1 |
| 1994 | Comparative Analysis of New CMOS Leaf Cells for OTC RoutingabstractRecently four new cell models have been developed for over the cell routing. The usefulness of a cell model cannot simply be determined by utilization of OTC areas since cell widths, gate delays and layout parameters must also be considered. In this paper, we develop standard cells libraries in all the four models and compare the cell width and gate delay analysis of the cells. We also study the parameters which contribute to the variation in cell widths and gate delay between the different cell models. We show that the main parameters which contribute to the difference in cell widths in the four models are the number of terminals, intracell routing and cell functionality.> Pramod Anne, Aditya Reddy, Naveed A. Sherwani, Anand Panyam, Siddharth Bhingarde |
ISCAS | 4 |
| 1994 | An Efficient Four Layer Over-the-Cell RouterabstractSeveral Over-the-Cell (OTC) routing algorithms have been proposed for two and three layer processes. All the existing OTC routers assume that the terminals are laid out in a specific predetermined fashion. These restrictions on the terminals complicate the task of cell design and increase the width of the cells. In this paper, we develop a four layer OTC router which allows arbitrary terminal locations. Freed from fixed terminal placement restrictions, cell designers can aim to design with minimum width. Our router has been implemented and tested on several circuits. For most of the circuits, it obtained channel-less layouts.> Sreekrishna Madhwapathy, Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam |
ISCAS | 4 |
| 1993 | Efficient Over-the-cell Routing Algorithm for General Middle Terminal Model
Siddharth Bhingarde, Anand Panyam, Naveed A. Sherwani |
ISCAS | 2 |
| 1993 | Middle terminal cell models for efficient over-the-cell routing in high-performance circuitsabstractA new class of cell models called middle terminal models (MTM) is introduced. MTM-based cells allow flexibility in the selection of terminal locations and therefore utilize the over-the-cell (OTC) area more efficiently, as compared to cells based on existing models. For MTM-based designs, two new routers, MTM+V and MTM-V are presented. The first router is suitable for processes that allow vias over-the-cell and is based on an optimal Theta (K) algorithm for terminal row selection for over-the-cell channel routing, where K is the number of cell rows. The second router is suitable for the processes which do not allow vias in over-the-cell areas. This router consists of two key steps. The first step consists of the selection of a maximum planar set of nets for routing in between the terminal rows. For the second step, an optimal algorithm is developed for planar routing between the terminal row and the cell boundary. The experimental results on the PRIMARY I benchmark show that for a two-layer model, MTM-V performs 4.20% better than the best existing routers.> Siddharth Bhingarde, Anand Panyam, Naveed A. Sherwani |
IEEE Trans. Very Large Scale Integr. Syst. | 2 |