Demo Data from EDBT 2026 / reviewers in the wild / expert
D. J. Gilbert
dblp:76/10970
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1982
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › physical design › placement and routing
gate array layout |
0.0 | 1 | 1982 | CGALA-a multi technology Gate Array Layout system · DAC 1982 |
Electronic design automation
physical design |
0.0 | 1 | 1982 | CGALA-a multi technology Gate Array Layout system · DAC 1982 |
Electronic design automation › physical design
placement and routing |
0.0 | 1 | 1982 | CGALA-a multi technology Gate Array Layout system · DAC 1982 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1982 | CGALA-a multi technology Gate Array Layout systemabstractThis paper describes the Computerized Gate Array Layout system (CGAL), a general purpose tool developed at Sperry Univac to provide efficient and reliable automated layouts for a variety of master slice arrays. The system contains algorithms for the construction of initial placement, placement improvement, global routing, channel routing and planar routing. The system also provides for user interaction through a design language and graphical output. Lee F. Todd, J. M. Hansen, S. V. Pantulu, John L. Barron, D. J. Gilbert, R. J. Anderson, A. K. Biyani |
DAC | 5 |