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David L. Black 0001

dblp:76/1966-1 · DBLP profile ↗
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7ranked-venue papers
4as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 4 first-authorSoftware engineering, systems software and programming languages · 3 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Parallel and multicore computing · 34% Memory systems · 31% Distributed systems · 26%
Software engineering, system software, and programming languages
4 papers
Operating systems · 100%

Topics — the 12 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems › middleware
low-latency messaging
0.011996
FLIPC: A Low Latency Messaging System for Distributed Real Time Environments · USENIX ATC 1996
Parallel and multicore computing › parallel programming models
message passing
0.011996
FLIPC: A Low Latency Messaging System for Distributed Real Time Environments · USENIX ATC 1996
Memory systems › memory management
virtual memory
0.021989
Translation Lookaside Buffer Consistency: A Software Approach · ASPLOS 1989
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · ASPLOS 1987
Operating systems › resource management › memory management
virtual memory
0.021988
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · IEEE Trans. Computers 1988
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · ASPLOS 1987
Parallel and multicore computing › multiprocessor system
multiprocessor operating systems
0.021988
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · IEEE Trans. Computers 1988
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · ASPLOS 1987
Operating systems › resource management › memory management › virtual memory
TLB shootdown
0.011989
Translation Lookaside Buffer Consistency: A Software Approach · ASPLOS 1989
Operating systems › resource management › memory management › virtual memory
paging
0.011988
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · IEEE Trans. Computers 1988
Memory systems › shared memory
distributed shared memory
0.011988
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · IEEE Trans. Computers 1988
Embedded and real-time systems
distributed real-time systems
0.011996
FLIPC: A Low Latency Messaging System for Distributed Real Time Environments · USENIX ATC 1996
Operating systems › multiprocessing
multiprocessor operating system
0.011987
The Duality of Memory and Communication in the Implementation of a Multiprocessor Operating System · SOSP 1987
Memory systems › memory management
memory management unit
0.011987
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures · ASPLOS 1987
Distributed systems › operating system support
interprocess communication
0.011987
The Duality of Memory and Communication in the Implementation of a Multiprocessor Operating System · SOSP 1987

Methods — techniques the papers use, named apart from their topics

performance evaluation · 0.0architecture-independent design · 0.0
YearPublicationVenuePosition
1996 FLIPC: A Low Latency Messaging System for Distributed Real Time Environments
David L. Black 0001, Randall D. Smith, Steven J. Sears, Randall W. Dean
USENIX ATC1
1991 Locking and Reference Counting in the Mach Kernel
David L. Black 0001, Avadis Tevanian, David B. Golub, Michael W. Young
ICPP (2)1
1989 Translation Lookaside Buffer Consistency: A Software Approach
abstract
We discuss the translation lookaside buffer (TLB) consistency problem for multiprocessors, and introduce the Mach shootdown algorithm for maintaining TLB consistency in software. This algorithm has been implemented on several multiprocessors, and is in regular production use. Performance evaluations establish the basic costs of the algorithm and show that it has minimal impact on application performance. As a result, TLB consistency does not pose an insurmountable obstacle to multiprocessors with several hundred processors. We also discuss hardware support options for TLB consistency ranging from a minor interrupt structure modification to complete hardware implementations. Features are identified in current hardware that compound the TLB consistency problem; removal or correction of these features can simplify and/or reduce the overhead of maintaining TLB consistency in software.
David L. Black 0001, Richard F. Rashid, David B. Golub, Charles R. Hill, Robert V. Baron
ASPLOS1
1988 Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures
abstract
The authors describe the design, implementation, and evaluation of the Mach virtual-memory management system. The Mach virtual-memory system exhibits architecture independence, multiprocessor and distributed system support, and advanced functionality. The performance of this virtual-memory system is shown to often exceed that of commercially developed memory management systems targeted at specific hardware architectures.>
Richard F. Rashid, Avadis Tevanian, David B. Golub, Robert V. Baron, David L. Black 0001, William J. Bolosky, Jonathan Chew
IEEE Trans. Computers6
1987 Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures
abstract
This paper describes the design and implementation of virtual memory management within the CMU Mach Operating System and the experiences gained by the Mach kernel group in porting that system to a variety of architectures. As of this writing, Mach runs on more than half a dozen uniprocessors and multiprocessors including the VAX family of uniprocessors and multiprocessors, the IBM RT PC, the SUN 3, the Encore MultiMax, the Sequent Balance 21000 and several experimental computers. Although these systems vary considerably in the kind of hardware support for memory management they provide, the machine-dependent portion of Mach virtual memory consists of a single code module and its related header file. This separation of software memory management from hardware support has been accomplished without sacrificing system performance. In addition to improving portability, it makes possible a relatively unbiased examination of the pros and cons of various hardware memory management schemes, especially as they apply to the support of multiprocessors.
Richard F. Rashid, Avadis Tevanian, David B. Golub, Robert V. Baron, David L. Black 0001, William J. Bolosky, Jonathan Chew
ASPLOS6
1987 The Duality of Memory and Communication in the Implementation of a Multiprocessor Operating System
abstract
Mach is a multiprocessor operating system being implemented at Carnegie-Mellon University. An important component of the Mach design is the use of memory objects which can be managed either by the kernel or by user programs through a message interface. This feature allows applications such as transaction management systems to participate in decisions regarding secondary storage management and page replacement.
Avadis Tevanian, Richard F. Rashid, David B. Golub, Jeffrey L. Eppinger, Jonathan Chew, William J. Bolosky, David L. Black 0001, Robert V. Baron
SOSP8
1986 On the Existence of Delay-Insensitive Fair Arbiters: Trace Theory and its Limitations
David L. Black 0001
Distributed Comput.1