Fast power transistors require a tight control of their switching trajectory to exploit them at full speed, without degrading reliability and delivered electromagnetic emission figures of merit. By using active gate drivers in place of conventional ones, the switching trajectory can be shaped to reduce current and voltage overshoots, as well as the amplitude of oscillations. However, the tuning of such drivers is still an open issue. This paper investigates the damping of oscillations by means of active gate drivers, and proposes a method to tune them a-priori. The target switching waveforms are evaluated by means of non-linear damping elements in simulation, easing the tuning procedure. The proposed method was assessed on a digital active gate driver, providing the initial set-point for the adaptive controller. The convergence time measured experimentally was found to be as low as$\mathrm {50~ \mu \text {s} }$for the overall load current range, whilst not affecting the conversion efficiency of the dc-dc converter exploited as test case.

Communication systems based on in-pipe acoustic propagation have great potential to cover areas in which traditional infrastructure is unavailable. Characterization of the channel plays an important role in the design of any communication system. However, in case of spatially large channels, this aspect needs further investigations. In the present work, a method for the characterization of an acoustic channel is presented. This is based on the measurement of the complex transfer functions relating voltages and pressures at the channel ports. Such a technique was validated on a 75 m long segment of a urban water distribution pipeline. The measurements assessed the frequency selectivity of the acoustic channel and the wave propagation speed. From experimental results, the response of the acoustic channel had an overall low-pass behavior, but it showed several deep notches at low frequency.

This work presents a new methodology to derive the equivalent circuit of the parasitic paths that propagate switching noise in mixed-signals integrated circuits and that usually lead to unintended crosstalk and electromagnetic emission issues. The methodology is based on small-signal analyses performed at the individual analog and digital microcontroller building block level, on electromagnetic simulations carried out to describe the power supply network at the chip- and at the package-level and on the analysis of the chip layout and process technology data to model the parasitic coupling paths through the semiconductor substrate. The electrical model of microcontrollers generated according to this methodology, consists of a low-complex and linear netlist that provides insight regarding the relationships between the design parameters and noise propagation paths in the early design phases, through simulations in a SPICE-like environment. The proposed approach does not rely on experimental test results. In this paper, the electric model of an 8 bit microcontroller, which validity has been proved by scattering parameter and conducted emission measurements, is derived.

This paper deals with the susceptibility of smart power integrated circuits to substrate interference. In particular, propagation of RF interference through substrate and its effects on analog cells are investigated. A new method, developed to identify a parasitic substrate-coupling network in VLSI devices, has been customized for a smart power technology process. The layout view of a specific circuit is elaborated in order to extract a netlist composed of circuits in the die surface and the substrate parasitic network. Predictions are obtained by executing time-domain simulations. A simple test circuit composed of a power transistor and an OTA is considered. Investigations are carried out for various layout of the same rest circuit and the effectiveness of shielding substrate contacts is evaluated.

This paper deals with the characterization of integrated circuit electromagnetic emissions. The TEM cell method is employed in order to identify primary emission sources of complex digital devices. An 8-bit microcontroller, realized by a 0.8 /spl mu/m HCMOS process is considered. It is composed of several building blocks like the central processing unit, the analog to digital converter and the EPROM memory. Emission measurements are performed by operating a specific program code stored in the microcontroller memory and emissions due to each building block are identified.