A capacitor-based Power Loss Protection (PLP) has been widely adopted in modern enterprise-level solid-state drives (SSD) for data security and performance. It becomes challenging to guarantee lifetime data security as SSD capacity rapidly increases in limited physical volume and cost. In this work, we proposed a dynamic control of capacitor voltage to enhance the reliability and energy efficiency of the PLP capacitors. Unlike previous studies, we reduce the voltage charged in the capacitor according to the status of the volatile contents to be protected. The proposed method is implemented in an SSD platform prototype. We successfully verified the feasibility of synchronized control of the capacitor voltage and volatile contents. The experimental result shows that the proposed method can reduce the capacitor voltage by 33% on average, corresponding to a 2.27 times longer lifetime and 41% reduction of leakage-induced energy loss. Finally, we can reduce the over-design factor by 36% of the fixed voltage setup.

Even with advances in single-cell batteries, mobile users still experience low battery anxiety. By analyzing 19,855 hours of user behavior, we proposeMixMax, a heterogeneous battery system consisting of three complementary battery types tailored to minimizing low battery time. While the heterogeneous battery system offers an opportunity to simultaneously improve capacity and charging speed, one must face non-trivial challenges to design charge/discharge policies during runtime and determine the ratio of enclosed batteries. They are highly dependent on each other, which entails almost infinite candidates for the choice.MixMaxsimplifies this by reformulating the problem as an optimization problem, breaking it down into manageable sub-problems. However,MixMaxstill faces the challenge of catering to all users due to their diverse battery usage patterns. To address this, we introduce a customizedMixMaxthat groups users based on their usage patterns and provides tailored battery solutions. In evaluatingMixMax, we fabricate coin-cell batteries, develop a precise battery emulator using the fabricated batteries, and prototypeMixMaxon a real-world smartphone. Our evaluation shows thatMixMaxreduces low battery time by up to 24.6% without compromising capacity, volume, weight, or user behavior, and its customized version can further reduce it by up to 46.2%.

Despite the physical advance of an existing single-cell battery system, mobile users are still suffering from low battery anxiety. With a careful analysis of users' battery usage behavior collected for 19,855 hours, we propose a heterogeneous battery system, MixMax, consisting of three complementary battery types tailored to minimizing the low battery time. While composing a heterogeneous battery system opens up a chance to simultaneously improve the capacity and the charging speed, one must face non-trivial challenges to determine the ratio of enclosed batteries and charge/discharge policies during the run-time. They are highly dependent on each other, which entails almost infinite candidates for the choice. MixMax gracefully unwinds the dependencies as it formulates the decision-making problem into an optimization problem and decomposes it into multiple sub-problems instead. To evaluate MixMax, we fabricate coin-cell batteries and experiment with them to model an accurate battery emulator which sophisticatedly reproduces the dynamics of battery systems. Our experimental results demonstrate that MixMax can reduce the low battery time by up to 24.6% without compromising capacity, volume, weight, and more importantly, users' battery usage behavior. In addition, we prototype MixMax on a smartphone, presenting the practicality of MixMax on mobile systems.

This study presents comprehensive experimental results for the IEEE BigData 2022 Cup, using a generative adversarial network (GAN) to generate appropriate malign samples to improve a malware classifier’s performance. For the experiments, we employed conditional tabular GAN (CTGAN), conditional table GAN (CTAB-GAN), and complementary GAN architectures to deal with the data imbalance problem commonly encountered in classification tasks. The results showed that CTAB-GAN outperformed the other GANs in producing synthetic data that are statistically comparable to the given training data. This shows that the classifier’s performance improved on the validation dataset, and suggests that better classification performance can be achieved in terms of machine learning efficacy using better quality synthetic data. Although CTAB-GAN performed better than CTGAN and Complementary GAN in terms of statistical similarity and machine learning efficacy, it could overfit on the training data. Therefore, we used both CTGAN and CTAB-GAN to produce a balanced dataset to train the classifier for the final solution. The root mean square error of the classifier was 0.103, which is an improvement of 0.066 from the baseline performance of 0.169.

In this paper, we present an SSD design that is resilient to sudden power-off failures. Modern SSDs use a large number of capacitors that act as energy reserves to persist both host data and SSD metadata in the unforeseen event of a power outage. However, these capacitors take up a large footprint that limits the SSD’s density. We present a series of design choices that significantly reduce the SSD’s dependence on capacitors, all the while meeting the durability, consistency, and power-on time constraints. We demonstrate that at a modest performance overhead of 11%, the amount of required capacitance is reduced by 97.87%.

While outlier detection has been intensively studied in many applications, interpretation is becoming increasingly important to help people trust and evaluate the developed detection models through providing intrinsic reasons why the given outliers are identified. It is a nontrivial task for interpreting the abnormality of outliers due to the distinct characteristics of different detection models, complicated structures of data in certain applications, and imbalanced distribution of outliers and normal instances. In addition, contexts where outliers locate, as well as the relation between outliers and the contexts, are usually overlooked in existing interpretation frameworks. To tackle the issues, in this paper, we propose a Contextual Outlier INterpretation (COIN) framework to explain the abnormality of outliers spotted by detectors. The interpretability of an outlier is achieved through three aspects, i.e., outlierness score, attributes that contribute to the abnormality, and contextual description of its neighborhoods. Experimental results on various types of datasets demonstrate the flexibility and effectiveness of the proposed framework.

Conventional internal combustion engine vehicles (ICEV) generally have less than a 30% of fuel efficiency, and the most wasted energy is dissipated in the form of heat energy. The heat energy maintains the engine temperature for efficient combustion as a good aspect, but the amount of heat generation is excessive and eventually breaks the engine components unless advanced cooling system technologies are supported such as high-capacity radiators, elaborated water jackets, high-flow rate coolant pumps, etc. The excessive heat dissipation plays a key role on a poor fuel economy, but reclamation of the heat energy has not been a main focus of vehicle design. This work is first to propose a cross-layer, system-level solution to enhance thermoelectric generator (TEG) array efficiency introducing online reconfiguration of TEG modules. The proposed method is useful to any sort of TEG array to reclaim wasted heat energy because cooling and exhaust systems generally have different inlet and outlet temperatures. In this paper, we deploy the proposed method to vehicle radiator heat energy harvesting, which does not affect the vehicle performance while exhaust heat energy harvesting may disturb the combustion and emission control integrity. We introduce a novel TEG reconfiguration and maximize the TEG array output in spite of dynamic change of the coolant flow rate and temperature, which results in a huge variation in the coolant temperature distribution of inside the radiator. The proposed method enables all the TEG modules to run at or close to their maximum power points (MPP) under dynamically changing vehicle operating conditions. Experimental results show up to a 34% enhancement compared with a fixed array structure, which is a common practice.

A framebuffer memory is data storage for the displayed image, which is one of the major power consumers in display systems. This paper proposes a power reduction technique for the on-chip framebuffer cache (FBC) performing a compressed image data management. The proposed architecture stores the compressed image data in the on-chip FBC, and the display controller decompresses the image data on the fly and sends it to the liquid crystal display panel. The compression and decompression processes incur additional power consumption but achieve lower system-wide power consumption. We implement the proposed architecture in a field-programmable gate array platform to confirm power saving by actual measurement. Experiments demonstrate that the proposed on-chip FBC significantly reduces the number of the off-chip framebuffer memory accesses and saves a large portion of the system-wide power consumption accordingly.

This paper introduces a joint charge and thermal management problem for batteries in a battery-supercapacitor hybrid power source of a portable system, which has been equipped with a forced convection cooling technique, such as a fan. A key consideration in such a system is that the battery aging depends strongly on the battery temperature, which is in turn a function of the workload running on the device and the control policy for the fan. More precisely, this paper presents a hierarchical algorithm for maximizing the battery lifespan under given workload conditions. The algorithm relies on a combination of reinforcement learning and dynamic programming techniques. Simulation results show that the proposed algorithm achieves up to 2× improvements in battery lifespan, resulting in completion of up to 80% additional workload before the battery expires.

Large liquid crystal display (LCD) technology is being widely used in every corner of our modern life, ranging from personal laptops to flat-panel televisions. Among all the components in an LCD display system, the backlight panel is the dominant power consumer, irrespective of lighting technology or class. In this paper, a saliency-based field-programmable gate array accelerator for revolutionary LCD power management is proposed that allows dynamic modulation of the different zones of the backlight panel. This hardware accelerator-based system is capable of processing a high-definition video stream in real-time and uses less than 50% of the power that a normal LCD display system consumes, with minimum overhead. We also compare our proposed approach with other state-of-the-art power-aware methods and show numerous advantages using our data-driven strategy.

Dynamic voltage scaling (DVS) has proven effective in minimizing the power consumption of OLED displays, resulting only in minimal image distortion. This technique has been extended to perform zone-specific DVS by dividing the panel area into zones and applying independent DVS to each zone based on the displayed content. The application of the latter technique to large-area OLED displays has not been done in part due to a high overhead of its dedicated DC-DC converter for each zone and low conversion efficiency when the load current of each converter lies outside the desirable range. To address this issue, this work proposes a reconfigurable power delivery network architecture, comprised of a small number of DC-DC converters, a switch network and an online controller, to realize fine-grained (zone-specific) DVS in large-area OLED display panels. The proposed framework consistently achieves high power conversion efficiency and significant energy saving while preserving the image quality. Experimental results demonstrate that up to 36% power savings can be achieved in a 65" 4K Ultra high-definition OLED display by using the proposed framework.

Photovoltaic (PV) power generation systems are usually accompanied by battery to bridge the gap between the generation and load demand. Solar tracking is also used to enhance the power stability and increase the amount of collected energy from the Sun. However, battery and tracking devices significantly increase the system cost, and they are subject to wear and tear, which makes maintenance-free installation challenging. In this work, we conduct the design optimization of a twofold three dimensional PV panel for solar-powered systems. With the proposed three dimensional arrangement, we extend the solar-powered time of the target application that is powered only with solar power. Experimental results show that the proposed architecture and control method extend the service time of the target system by up to 23% compared to a non-reconfigurable flat panel with the same PV panel area.

The evaluation of the cycle life of batteries is an essential task in the assessment of the reliability and cost of battery-operated devices. Several compact cycle life models have been proposed in the literature, that exhibit a general trade-off between generality and accuracy. Some models are based on a compact equation derived from experimental data and try to extract a general relationship between cycle life and the relevant parameters (mostly the depth of discharge), but suffer from poor accuracy. At the other extreme, more accurate models, based on incorporating the aging effect into an equivalent circuit, tend to be focused on a specific device and are seldom applicable to another battery. In this work we propose an equation-based model that tries to overcome the accuracy limits of previous similar models. The model parameters are obtained by fitting the curve based on information reported in datasheets, and can be adapted (with different accuracy levels) to the amount of available information. We applied the model to various commercial batteries for which full information on their cycle life is available. Results show an average estimation error, in terms of the number of cycles, generally smaller than 10%, which is consistent with the typical tolerance provided in the datasheets, and much lower than previous equation-based models.

LPDDR2-NVM has been announced as an industry standard to efficiently interface with non-volatile memory devices such as phase change memory (PCM). This standard interface has been adopted in most commercial PCM devices. In this paper, we devise a prefetch-based dynamic row buffer management that targets the LPDDR2-NVM devices for enhancing performance with almost negligible implementation overhead. Our extensive simulations with timing parameters from the industry's commercial PCM devices demonstrate that the proposed method enhances the performance of memory systems up to 11.3% when compared with the static optimum configuration with fairly low-cost overheads.

Phase change memory (PCM) is an attractive candidate for the future memory, but it still has several limitations to overcome such as write latency and long-term endurance. A large body of literature has been dedicated to solving these problems. However, almost all of the previous studies did not consider an important practical aspect of the PCM - an interface. The LPDDR2-NVM standard interface recently introduced by JEDEC is widely adopted by the manufacturers of commercial PCM these days. The LPDDR2-NVM standard allows a more flexible use of row buffers compared to the conventional DRAM interface. In this paper, we explore the design space of row buffer architecture in the PCM with LPDDR2-NVM interface. The effect of row buffer architecture on memory performance is investigated in terms of unit size and number of RDBs, and its management policy. We use the timing parameters from industry prototype PCM and analyze the result from the perspective of Pareto's optimum. The experimental results show that a properly-designed row buffer architecture enhances system-level performance up to 44.2% even at the same cost.

The cell-to-cell variability of batteries is a well-known problem particularly when it comes to the assembly of large battery packs. Different battery cells exhibit substantial variability due to manufacturing tolerances, which should be assessed and managed carefully. Such variability has been approached mostly from the point of view of the chemical and physical phenomena, but these solutions are normally too complicated for the system-level design of electric applications. This paper proposes a combined cell-to-cell variability model of the capacity and internal resistance of a Li-ion battery that accounts for the variability effects in the cell manufacturing process. The proposed model allows to verify some known properties, such as the correlation between the capacity and internal resistance, to be verified qualitatively and the amount of variability and its impact on the design of battery packs to be assessed quantitatively. Using this model, the issue of how to consider the variability when constructing battery packs was also addressed. Modern battery packs normally incorporate some cell balancing circuitry, which is meant to balance cell voltages during charging at the expense of a bypassed (unstored) charge. For discharge, the cell-to-cell variability hides a part of the usable capacity of the battery pack. This paper proposes the use of variability information to assemble battery packs with minimal intracolumn variance of capacity. A weight-based variance minimization method, based on the correlation between cell capacity and weight is proposed to avoid resorting to direct battery capacity measurements, which is time-consuming and requires costly measurement equipment. The simulation result shows that the proposed weight-based approach allows an acceptable management of the cell-to-cell variability without the discharging experiment.

Cell-to-cell variability of batteries is a well-known problem especially when it comes to assembling large battery packs. Different battery cells exhibit substantial variability among them due to manufacturing tolerances, which should be carefully assessed and managed. Although battery packs usually incorporate some cell balancing circuitry, it is supposed to balance cell voltages dynamically at the expense of bypassed (not stored) charge.

This paper introduces a novel sensor-less, event-driven power analysis framework called FEPMA for providing highly accurate and nearly instantaneous estimates of power dissipation in an Android smartphone. The key idea is to collect and correctly record various events of interest within a smartphone as applications are running on the application processor within it. This is in turn done by instrumenting the Android operating system to provide information about power/performance state changes of various smartphone components at the lowest layer of the kernel to avoid time stamping delays and component state observability issues. This technique then enables one to perform fine-grained (in time and space) power metering in the smartphone. Experimental results show significant accuracy improvement compared to previous approaches and good fidelity with respect to actual current measurements. The estimation error of the proposed method is lower by a factor of two than the state-of-the-art method.

Thermal analysis and management of batteries have been an important research issue for battery-operated systems such as electric vehicles and mobile devices. Nowadays, battery packs are designed considering heat dissipation, and external cooling devices such as a cooling fan are also widely used to enforce the reliability and extend the lifetime of a battery. This type of approaches that target the enhancement of the cooling efficiency via the reduction of the thermal resistance cannot achieve an immediate temperature drop to avoid a thermal emergency situation. Approaches based on removing the heat from the heat sources via idle period insertion (similar to what is done for silicon devices) would allow faster thermal response; however it is not obvious how to implement these schemes in the context of batteries. In this paper, we propose the use of a simple parallel battery-supercapacitor hybrid architecture with a dual-mode discharging strategy that can provide immediate temperature management, in which the supercapacitor is used as an energy buffer during the idle periods of the battery. Simulation results shows that the proposed method can keep the battery temperature within the safe range without external cooling devices while exploiting the advantage of the battery-supercapacitor parallel connection.

The market of portable devices, wireless sensors, electric vehicles and storage systems has grown enormously in recent years. As a consequence, batteries and related technologies have become one of the major topics for researchers. Due to the large variety of applications in which batteries are involved, battery modeling is becoming an extremely important research topic. This relevance is witnessed by the number of papers addressing battery modeling.

The de-facto standard approach in battery modeling consists of the definition of a generic model template in terms of an equivalent electric circuit, which is then populated either using data obtained from direct measurements on actual devices or by some extrapolation of battery characteristics available from datasheets. These models typically describe only intra-cycle effects, that is, those manifesting within a single charge/discharge cycle of a battery. However, basic battery dynamics, during a single discharge, cannot provide a true estimate of the actual lifetime of the battery, e.g., how its usability decreases due to long-term and irreversible effects, such as the fading of capacity due to aging or to repeated cycling. While some solutions in the literature provide answers to this problem by proposing suitable models for these effects, they do not provide solutions for how to incorporate them into a generic model template. In this work we propose a method to include inter-cycle battery effects into a reference model template in an automated way, and using solely data reported by battery manufacturers. Flexibility and accuracy of the proposed strategy are demonstrated by modeling a commercial lithium iron phosphate battery, whose datasheet provides long-term capacity fading information.

Availability of a simulation model of a battery is one of the most important requisites in the system-level design of battery-powered systems. The vast majority of the models describe the discharge behavior of the battery; so far, the estimation of charging time has been in fact only marginally studied because the charging phase is regarded as a relatively controlled process compared to discharge. In this paper, we present a compact macro-model for the estimation of charging time under the most widely used charge protocol, i.e., Constant Current-Constant Voltage (CC-CV). This model is derived under the consideration of the context of the existing models including the well-known Peukert's law and equivalent electric circuits. The estimation result with the proposed model based on the manufacturer's data of commercial Li-ion batteries shows fair accuracy, especially when compared to estimates on parameters extracted from discharge characteristics.

Smartphones consume a significant amount of power. Indeed, they can hardly provide a full day of use between charging operations even with a 2000 mAh battery. While power minimization and dynamic power management techniques have been heavily explored to improve the power efficiency of modules (processors, memory, display, GPS, etc.) inside a smartphone platform, there is one critical factor that is often overlooked: the power conversion efficiency of the power delivery network (PDN). This paper focuses on dc-dc converters, which play a pivotal role in the PDN of the smartphone platform. Starting from detailed models of the dc–dc converter designs, two optimization methods are presented: 1) static switch sizing to maximize the efficiency of a dc–dc converter under statistical loading profiles and 2) dynamic switch modulation to achieve the high efficiency enhancement under dynamically varying load conditions. To verify the efficacy of the optimization methods in actual smartphone platforms, this paper also presents a characterization procedure for the PDN. The procedure is as follows: 1) group the modules in the smartphone platform together and use profiling to estimate their average and peak power consumption levels and 2) build an equivalent dc–dc converter model for the power delivery path from the battery source to each group of modules and use linear regression to estimate the conversion efficiency of the corresponding equivalent converter. Experimental results demonstrate that the static switch sizing can achieve 6% power conversion efficiency enhancement, which translates to 19% reduction in power loss general usage of the smartphone. The dynamic switch modulation accomplishes similar improvement at the same condition, while also achieving high efficiency enhancement in various load conditions.

Emerging mobile systems integrate a lot of functionality into a small form factor with a small energy source in the form of rechargeable battery. This situation necessitates accurate estimation of the remaining energy in the battery such that user applications can be judicious on how they consume this scarce and precious resource. This paper thus focuses on estimating the remaining battery energy in Android OS-based mobile systems. This paper proposes to instrument the Android kernel in order to collect and report accurate subsystem activity values based on real-time profiling of the running applications. The activity information along with offline-constructed, regression-based power macro models for major subsystems in the smartphone yield the power dissipation estimate for the whole system. Next, while accounting for the rate-capacity effect in batteries, the total power dissipation data is translated into the battery's energy depletion rate, and subsequently, used to compute the battery's remaining lifetime based on its current state of charge information. Finally, this paper describes a novel application design framework, which considers the batterys state-of-charge (SOC), batterys energy depletion rate, and service quality of the target application. The benefits of the design framework are illustrated by examining an archetypical case, involving the design space exploration and optimization of a GPS-based application in an Android OS.

In this paper, a bio-inspired technique of finding the regions of highest visual importance within an image is proposed for reducing power consumption in modern liquid crystal displays (LCDs) that utilize a 2D light-emitting diode (LED) backlighting system. The conspicuity map generated from this neuromorphic saliency model, along with an adaptive dimming method, is applied to the backlighting array to reduce the luminance of regions of least interest as perceived by a human viewer. Corresponding image compensation is applied to the saliency modulated image to minimize distortion and retain the original image quality. Experimental results shows average 65% power can be saved when the original display system is integrated with a low-overhead real-time hardware implementation of the saliency model.

Cycle life of a battery largely varies according to the battery operating conditions, especially the battery temperature. In particular, batteries age much faster at high temperature. Extensive experiments have shown that the battery temperature varies dramatically during continuous charge or discharge process. This paper introduces a forced convection cooling technique for the batteries that power a portable system. Since the cooling fan is also powered by the same battery, it is critical to develop a highly effective, low power-consuming solution. In addition, there is a fundamental tradeoff between the service time of a battery equipped with fans and the cycle life of the same battery. In particular, as the fan speed is increased, the power dissipated by the fan goes up and hence the full charge capacity of the battery is lost at a faster rate, but at the same time, the battery temperature remains lower and hence the battery longevity increases. This is the first work that formulates the adaptive thermal management problem for batteries (ATMB) in portable systems and provides a systematic solution for it. A hierarchical algorithm combining reinforcement learning at the lower level and dynamic programming at the upper level is proposed to derive the ATMB policy.

Electrical energy systems (EESs) include energy generation, distribution, storage, and consumption, and involve many diverse components and sub-systems to implement these tasks. This paper represents a first step towards the computer-aided design for EESs, encompassing modeling, simulation, design and optimization of these systems. CAD for EESs is a challenging task that mandates a multidisciplinary and heterogeneous approach. We identify similarities and differences between electrical energy systems and electronics systems in order to inherit as much as possible the profound legacy resources of electronic design automation (EDA). We introduce fundamental concepts, from the general problem formulation to the development and deployment of efficient, scalable, and versatile CAD and EDA methods and framework for the optimal or near-optimal EESs.

The thermal management is a crucial design problem for mobile devices because it greatly affects not only the device reliability, but also the leakage energy consumption. Conventional dynamic thermal management (DTM) techniques work well for the computer systems. However, due to the limitation of the physical space in mobile devices, the thermal coupling effect between the major heat generation components, such as the application processor (AP) and the battery, plays an important role in determining the temperature inside the mobile device package. Due to this effect, the thermal behavior of one part is no longer independent of the other, but is affected by the temperature of other parts. This is the first work that quantitatively characterizes the thermal coupling between the battery and AP and presents a predictive DTM for mobile devices considering this effect. Simulation results show that the proposed DTM method significantly reduces the thermal violations for the target mobile devices.

Models based on an electrical circuit equivalent have become the most popular choice for modeling the behavior of batteries, thanks to their ease of co-simulation with other parts of a digital system. Such circuit models are actually model templates: the specific values of their electrical elements must be derived by the analysis of the specific battery devices to be modeled. This process requires either to measure the battery characteristics or to derive them from the datasheet. In the latter case, however, very often not all information are available and the model fitting becomes then unfeasible. In this paper we present a methodology for deriving, in a semi-automatic way, circuit equivalent battery models solely from data available in a battery datasheet. In order to account for the different amount of information available, we introduce the concept of “level” of a model, so that models with different accuracy can be derived depending on the available data. The methodology requires only minimal intervention by the designer and it automatically generates MATLAB models once the required data for the corresponding model level are transcribed from the datasheet. Simulation results show that our methodology allows to accurately reconstruct the information reported in the datasheet as well as to derive missing ones.

Due to manufacturing tolerances, different battery cells exhibit substantial variability among them, which should be carefully assessed and managed, especially when assembling large battery packs. Cell-to-cell variability has been mostly approached from the point of view of the chemical and physical phenomena, but these studies did not provide a practical solution for the system-level design. In this work, we propose a combined cell-to-cell variation model of the capacity and of the internal resistance of a battery cell that accounts for variability effects in the cell manufacturing process. The model is derived from analytical models for a specific type of Li-ion cell provided in the literature, from which we identify what model parameters can be regarded as true random variables. This allows transforming capacity and internal resistance into the functions of random variables, which can be incorporated into an equivalent circuit model that is suitable for the system-level statistical simulations. The proposed model allows us to qualitatively verify some known properties such as the correlation between capacity and internal resistance, and quantitatively assess the amount of variability and its impact on the design of battery packs.

Dynamic voltage and frequency scaling (DVFS) has been studied for well over a decade. Nevertheless, existing DVFS transition overhead models suffer from significant inaccuracies; for example, by incorrectly accounting for the effect of DC-DC converters, frequency synthesizers, voltage, and frequency change policies on energy losses incurred during mode transitions. Incorrect and/or inaccurate DVFS transition overhead models prevent one from determining the precise break-even time and thus forfeit some of the energy saving that is ideally achievable. This paper introduces accurate DVFS transition overhead models for both energy consumption and delay. In particular, we redefine the DVFS transition overhead including the underclocking-related losses in a DVFS-enabled microprocessor, additional inductor IR losses, and power losses due to discontinuous-mode DC-DC conversion. We report the transition overheads for a desktop, a mobile and a low-power representative processor. We also present DVFS transition overhead macromodel for use by high-level DVFS schedulers.

Organic light emitting diode (OLED) display is a self-illuminating device that is supposed to be more power efficient than liquid crystal display (LCD). However, OLED display panels consume as much power as LCD panels due to total internal reflection. As the power consumption of the OLED panel depends on the pixel colors, most of the earlier power saving methods alter the pixel colors. In practice, such OLED power saving techniques can hardly accommodate photo viewers and movie players. This paper introduces the first OLED power saving technique that dynamically changes the supply voltage of the panel. Reduced supply voltage results in both power saving and decreased pixel luminance, but model-based color correction restores the decreased luminance with minimum color distortion. This technique is similar to dynamic backlight scaling of LCDs but is based on the unique characteristics of the OLED drivers. We provide an online color compensation algorithm using the luminance histogram. Luminance quantization in the histogram also achieves resource minimization. We develop a prototype and demonstrate the proposed OLED dynamic voltage scaling (DVS). Experimental result shows that the proposed OLED DVS saves up to 74.7% of the display power for the still images and up to 35.9% for movie clips.

Hybrid electrical energy storage (HEES) systems are composed of multiple banks of heterogeneous electrical energy storage (EES) elements with distinctive properties. Charge replacement in a HEES system (i.e., dynamic assignment of load demands to EES banks) is one of the key operations in the system. This paper formally describes the global charge replacement (GCR) optimization problem and provides an algorithm to find the near-optimal GCR control policy. The optimization problem is formulated as a mixed-integer nonlinear programming problem, where the objective function is the charge replacement efficiency. The constraints account for the energy conservation law, efficiency of the charger/converter, the rate capacity effect, and self-discharge rates plus internal resistances of the EES element arrays. The near-optimal solution to this problem is obtained while considering the state of charges (SoCs) of the EES element arrays, characteristics of the load devices, and estimates of energy contributions by the EES element arrays. Experimental results demonstrate significant improvements in the charge replacement efficiency in an example HEES system comprised of banks of battery and supercapacitor elements with a high-power pulsed military radio transceiver as the load device.

Partial shading is a serious obstacle to effective utilization of photovoltaic (PV) systems since it can result in significant output power degradation for the system. A PV system is organized as a series connection of PV modules, each module comprising of a number of series-parallel connected cells. This paper presents modified PV cell structures with integrated switches, imbalanced cell connection topologies for PV modules, and a dynamic programming algorithm to produce near-optimal reconfigurations of each PV module with the goal of maximizing the system output power level under any partial shading patterns. Through simulations, we have demonstrated up to a factor of 2.3X improvement in the output power level of a PV system comprised of 3 PV modules with 60 PV cells per module.

This paper is the first to present an efficient charge management algorithm focusing on extending the cycle life of battery elements in hybrid electrical energy storage (HEES) systems while simultaneously improving the overall cycle efficiency. In particular, it proposes to apply a crossover filter to the power source and load profiles. The goal of this filtering technique is to allow the battery banks to stably (i.e., with low variation) receive energy from the power source and/or provide energy to the load device, while leaving the spiky (i.e., with high variation) power supply or demand to be dealt with by the supercapacitor banks. To maximize the HEES system cycle efficiency, a mathematical problem is formulated and solved to determine the optimal charging/discharging current profiles and charge transfer interconnect voltage, taking into account the power loss of the EES elements and power converters. To minimize the state of health (SoH) degradation of the battery array in the HEES system, we make use of two facts: the SoH of battery is better maintained if (i) the SoC swing is smaller, and (ii) the same SoC swing occurs at lower average SoC. Now then using the supercapacitor bank to deal with the high-frequency component of the power supply or demand, we can reduce the SoC swing for the battery array and lower the SoC of the array. A secondary helpful effect is that, for fixed and given amount of energy delivered to the load device, an improvement in the overall charge cycle efficiency of the HEES system translates into a further reduction in both the average SoC and the SoC swing of the battery array. The proposed charge management algorithm for a Li-ion battery - supercapacitor bank HEES system is simulated and compared to a homogeneous EES system comprised of Li-ion batteries only. Experimental results show significant performance enhancements for the HEES system, an increase of up to 21.9% and 4.82x in terms of the cycle efficiency and cycle life, respectively.

A modern smartphone or tablet-PC is typically equipped a high-resolution and large-size display, which is a primary power consumer. In spite of the relatively high power efficiency of organic light emitting diode (OLED) displays, the integrated display sub-system exhibits low energy efficiency due to power losses in the battery and the boost voltage conversion. In this paper, we formulize the system energy efficiency in terms of the battery internal losses as well the converter efficiency considering the OLED power supply condition. We also analyze the effect of recently introduced dynamic (driver) supply voltage scaling technique for OLED displays on the overall system efficiency based on the system-level power profiling result. We introduce the optimal battery setup for different sizes and resolutions of the OLED display for modern smartphones and tablet-PCs.

Modern smartphones consume significant power and can hardly provide a full day's use between charging operations even with a 2000 mAh battery. This is in spite of many power management techniques being employed in the smartphones. This paper starts from the observation that modern smartphones waste a significant amount of the battery's stored energy during power conversion from the 3.7V output of a Li-Ion battery cell to different voltage levels needed to power various modules in a smartphone (processors, memory, display, GPS, etc.) Indeed the power conversion efficiency from the battery source to point of use in the smart phone has on average of only 60-75% efficiency. The approach taken to reduce this energy waste in smartphones is to (i) profile the power consumption of each module under different operating scenarios, (ii) build an equivalent DC-DC converter model for each smartphone module and estimate its power conversion efficiency, and (iii) change the parameters of the actual converters in the smartphone to improve the equivalent power conversion efficiencies for all modules. Experimental results demonstrate that we can achieve 6% to 15% power conversion efficiency enhancement, which translates to up to 30% reduction in the power losses incurred during power conversion in smartphones.

A joint optimization of the physical system and the cyber world is one of the key problems in the design of a cyber-physical system (CPS). The major mechanical forces and/or chemical reactions in a plant are commonly modified by actuators in the balance-of-plant (BOP) system. More powerful actuators requires more power, but generally increase the response of the physical system powered by the electrical energy generated by the physical system. To maximize the overall output of a power generating plant therefore requires joint optimization of the physical system and the cyber world, and this is a key factor in the design of a CPS. We introduce a systematic approach to the modeling and synthesis of a CPS that emphasize joint power optimization, using an active direct methanol fuel cell (DMFC) as a case study. Active DMFC systems are superior to passive DMFCs in terms of fuel efficiency thanks to their BOP system, which includes pumps, air blowers, and fans. However, designing a small-scale active DMFC with the best overall system efficiency requires the BOP system to be jointly optimized with the DMFC stack operation, because the BOP components are powered by the stack. Our approach to this synthesis problem involves i) BOP system characterization, ii) integrated DMFC system modeling, iii) configuring a system for the maximum net power output through design space exploration, iv) synthesis of feedback control tasks, and v) implementation.

Unlike liquid crystal display (LCD) panels that require high-intensity backlight, organic LED (OLED) display panels naturally consume low power and provide high image quality thanks to their self-illuminating characteristic. In spite of this fact, the OLED display panel is still the dominant power consumer in battery-operated devices. As a result, there have been many attempts to reduce the OLED power consumption. Since power consumption of any pixel of the OLED display depends on the color that it displays, previous power saving methods change the pixel color subject to a tolerance level on the color distortion specified by the users. In practice, the OLED power saving techniques cannot be used on common user applications such as photo viewers and movie players.

Modern batteries (e.g., Li-ion batteries) provide high discharge efficiency, but the rate capacity effect in these batteries drastically decreases the discharge efficiency as the load current increases. Electric double layer capacitors, or simply supercapacitors, have extremely low internal resistance, and a battery-supercapacitor hybrid may mitigate the rate capacity effect for high pulsed discharging current. However, a hybrid architecture comprising a simple parallel connection does not perform well when the supercapacitor capacity is small, which is a typical situation because of the low energy density and high cost of supercapacitors. This paper presents a new battery-supercapacitor hybrid system that employs a constant-current charger. The constant-current charger isolates the battery from supercapacitor to improve the end-to-end efficiency for energy from the battery to the load while accounting for the rate capacity effect of Li-ion batteries and the conversion efficiencies of the converters.

Direct methanol fuel cells (DMFCs) are a promising next-generation energy source for portable applications, due to their high energy density and the ease of handling of the liquid fuel. However, the limited range of output power obtainable from a fuel cell requires hybridization the introduction of a battery to form a stand-alone portable power source. Furthermore, the stringent operating conditions to be met by active DMFC systems mandate complicated balance of plant (BOP) control. We present a complete hybrid active DMFC system design and implementation in which a DMFC stack and a li-ion battery are linked by a hybridization circuit to share the applied load to exploit high energy density of the fuel cell and high power density of the battery. We describe systems for fuel delivery, air supply, temperature management, current and voltage measurement, DC-DC conversion and power distribution, motor driving, battery charge management, DMFC and circuit protection, and control of the DMFC and battery as a hybrid. We have designed and implemented an embedded system controller that consists of a 32-bit microcontroller, running under a real-time operating system, that incorporating multiple cascaded feedback control loops which manage the dynamics of BOP control. We demonstrate reliable and efficient maintenance of a constant fuel cell output current in spite of severe fluctuation of the load current.

Modern vehicle electronics control units (ECUs) are getting rapidly complicated because of active safety and semi-autonomous driving controls, such as electric stability program (ESP) and adaptive cruise control (ACC). Furthermore, the operational environment of ECUs is extremely harsh, especially in terms of an ambient temperature well exceeding 100°C, which causes a very small temperature headroom. Thus, ECUs require a careful temperature management and high performance at the same time.

Dynamic voltage and frequency scaling (DVS) has been studied for well over a decade, and even commercial systems widely support DVS nowadays. Nevertheless, existing DVS transition overhead models do not accurately reflect modern DVS architectures including modern DC-DC converters, PLL (Phase Lock Loop), and voltage and frequency change policies. Incorrect DVS overhead models prevent one from achieving the maximum energy gain, by misleading the DVS control policies. This paper introduces an accurate DVS overhead model, in terms of both energy consumption and time penalty, through detailed observation of modern DVS setups and voltage and frequency change guidelines from vendors. We introduce new major contributors to the DVS overhead including the performance underdrive loss of the DVS-enabled microprocessor, additional inductor IR loss, and so on, as well as consideration of power efficiency from discontinuous-mode DC-DC conversion. Our DVS overhead model enhances the DVS overhead model accuracy from 86% to 238% for Intel Core2 Duo E6850 and LTC3733.

Conventional dynamic thermal management (DTM) assumes that the thermal resistance of a heat-sink is a given constant determined at design time. However, the thermal resistance of a common forced-convection heat sink is inversely proportional to the flow rate of the air or coolant at the expense of the cooling power consumption. The die temperature of the silicon devices strongly affects its leakage power consumption and reliability, and it can be changed by adjusting the thermal resistance of the cooling devices. Different from conventional DTM which aims to avoid the thermal emergency, our proposed DTM regards the thermal resistance of a forced-convection heat sink as a control variable, and minimize the total power consumption both for computation and cooling. We control the cooling power consumption together with the microprocessor clock frequency and supply voltage, and track the energy-optimal die temperature. Consequently, we reduce a significant amount of the temperature-dependent leakage power consumption of the microprocessor while spending a bit higher cooling power than conventional DTM, and eventually consume less total power. Experimental results show the proposed DTM saves up to 8.2% of the total energy compared with a baseline DTM approach. Our proposed DTM also enhances the Failures in Time (FIT) up to 80% in terms of the electromigration lifetime reliability.

Existing thermal management systems for microprocessors assume that the thermal resistance of the heat-sink is constant and that the objective of the cooling system is simply to avoid thermal emergencies. But in fact the thermal resistance of the usual forced-convection heat-sink is inversely proportional to the fan speed, and a more rational objective is to minimize the total power consumption of both processor and cooling system. Our new method of dynamic thermal management uses both the fan speed and the voltage/frequency of the microprocessor as control variables. Experiments show that tracking the energy-optimal steady-state temperature can saves up to 17.6% of the overall energy, when compared with a conventional approach that merely avoids over-heating.

Memory devices often consume more energy than microprocessors in current portable embedded systems, but their energy consumption changes significantly with the type of transaction, data values, and access timing, as well as depending on the total number of transactions. These variabilities mean that an innovative tool and framework are required to characterize modern memory devices running in embedded system architectures. We introduce an energy measurement and characterization platform for memory devices, and demonstrate an application to multilevel-cell (MLC) flash memories, in which we discover significant value-dependent programming energy variations. We introduce an energy-aware data compression method that minimizes the flash programming energy, rather than the size of the compressed data, which is formulated as an entropy coding with unequal bit-pattern costs. Deploying a probabilistic approach, we derive energy-optimal bit-pattern probabilities and expected values of the bit-pattern costs which are applicable to the large amounts of compressed data typically found in multimedia applications. Then we develop an energy-optimal prefix coding that uses integer linear programming, and construct a prefix-code table. From a consideration of Pareto-optimal energy consumption, we can make tradeoffs between data size and programming energy, such as a 41% energy savings for a 52% area overhead.

We discover significant value-dependent programming energy variations in multi-level cell (MLC) flash memories, and introduce an energy-aware data compression method that minimizes the flash programming energy rather than the size of the compressed data. We express energy-aware data compression as an entropy coding with unequal bit-pattern costs. Deploying a probabilistic approach, we derive the energy-optimal bit-pattern probabilities and the expected values of the bit-pattern costs for the large amounts of compressed data which are typical in multimedia applications. Then we develop an energy-optimal prefix coding that uses integer linear programming, and construct a prefix code table. From a consideration of Pareto-optimal energy consumption, we make tradeoffs between data size and programming energy, such as a 35% energy saving for a 50% area overhead.