In this paper, a low-voltage (sub-1 Volt) resistor-free voltage reference is presented. The complete design was simulated and laid out in AMI 0.5 μm CMOS process. The design provides a temperature coefficient of 12.8 ppm/ C over a temperature range from 25 to 100 °C and occupies an area of 0.037 mm . Circuit description and experimental results of the proposed design are also presented.

In this paper, an embedded jitter measurement system is presented. The system uses the Vernier delay method to achieve high resolution. The jitter test circuit is implemented using current-mode logic, so it is fast enough for testing today's high-speed I/O signals such as PCI Express. And the differential structure also makes the circuit immune to common-mode noise. Other advanced jitter measurement functions can be added to the time interval analyzer, (TIA) system presented here. Simulation results show that the TIA system can be used with low-cost ATEs to meet jitter measurement requirements

Mixed-mode s-parameters assist in the design and characterization of four-port and three-port differential RF/microwave circuits. A new method for extracting mixed-mode s-parameters for four-port and three-port circuits modeled with SPICE is presented in which the s-parameters are extracted from node voltages. This method is efficient for circuits that are designed in SPICE and is free from any assumptions or approximations. Furthermore, this method provides valuable information on the relationships between the extracted mixed-mode s-parameters and the circuit's operation. This method is verified for a differential transformer circuit.

The "two filter" method for designing differential log-domain filters does not allow true class AB operation of filters having complex poles. However, differential log-domain filter structures that pass DC offsets from the input current splitter to each internal state variable can operate linearly to fairly high output modulation indices. New low-V/sub DD/ translinear current-splitter circuits are presented, including a harmonic-mean splitter, which produces increased DC offsets compared to geometric-mean circuits. The increased offsets are shown to allow significant increases in the range of indiscrete signals in differential log-domain filters with appropriate structures.

A previously published test for detecting unstable DC operating points is shown to be expressible in a simpler form. The new form is much easier to compute, especially in manual symbolic analysis, which is necessary for use in circuit design. The key parameter /spl Gamma/ is shown to be a generalization of the desensitivity factor, adapted for circuits with multiple feedback loops. The test of /spl Gamma/ is shown to fail to detect instability in a significant class of circuits. A new test based on negative differential resistance is devised that detects most such circuits.

Self-heating effects in bipolar junction transistors (BJTs) have been incorporated into PSpice DC and AC analyses. The effects are intrinsic to the operation of the transistor, and are treated within the device model, avoiding the need for thermal subcircuits. A physical thermal impedance model is provided, which allows prediction of the thermal impedance for devices with rectangular emitters from device geometry. A simple approximation is used to predict thermal frequency response. The predictive model can be overridden by measured thermal model parameters. The modifications made to the PSpice code are presented, along with some discussion of implementation alternatives. An example simulation is presented, demonstrating the significance of thermal effects in a typical circuits. Run-time comparisons show that the modified code is about half the speed of unmodified PSPice, mostly because of slower convergence. It is believed that this performance can be improved with suggested implementation changes.>