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Antonio Lain

dblp:77/1175 · DBLP profile ↗
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5ranked-venue papers
4as first author
0since 2021 · last 2006
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 3 first-authorSecurity and privacy · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 56% Runtime systems and virtual machines · 44%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Runtime systems and virtual machines
dynamic compilation
0.012000
Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications · IEEE Trans. Parallel Distributed Syst. 2000
Compilers and program optimization
parallelizing compiler
0.012000
Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications · IEEE Trans. Parallel Distributed Syst. 2000
Parallel and multicore computing › parallel scheduling
communication scheduling
0.012000
Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications · IEEE Trans. Parallel Distributed Syst. 2000
Parallel and multicore computing › parallel programming models and runtimes › parallel patterns
inspector-executor
0.012000
Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications · IEEE Trans. Parallel Distributed Syst. 2000
Parallel and multicore computing
parallel programming models
0.012000
Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications · IEEE Trans. Parallel Distributed Syst. 2000
Parallel and multicore computing
multicomputer
0.012000
Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications · IEEE Trans. Parallel Distributed Syst. 2000

Methods — techniques the papers use, named apart from their topics

trace arrays · 0.1runtime compilation · 0.1internal representations · 0.0internal representation · 0.0
YearPublicationVenuePosition
2006 Distributed Authorization Using Delegation with Acyclic Paths
abstract
We present a new trust management scheme for distributed authorization which can be easily implemented using X.509-based certificate chains, but does not require globally unique role names. A principal proves that he has authorization for a particular action by demonstrating the existence of an acyclic chain of bindings from a specified principal to himself where the sequence of labels in the chain matches a template. This template is in an easily-computed subset of regular path expressions. Our restrictions to acyclic paths and to a subset of path expressions enable us to permit controlled delegation, relax the requirement of global agreement on role names, and provide an intuitive abstraction. We show that some useful security properties can be determined in polynomial time. Our scheme has been used in practice to secure a management framework for distributed components: we give an overview of the implementation.
Antonio Lain, Miranda Mowbray
CSFW1
2000 Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications
abstract
This paper starts from a well-known idea, that structure in irregular problems improves sequential performance, and tries to show that the same structure can also be exploited for parallelization of irregular problems on a distributed-memory multicomputer. In particular, we extend a well-known parallelization technique called run-time compilation to use structure information that is explicit on the array subscripts. This paper presents a number of internal representations suited to particular access patterns and shows how various preprocessing structures such as translation tables, trace arrays, and interprocessor communication schedules can be encoded in terms of one or more of these representations. We show how loop and index normalization are important for detection of irregularity in array references, as well as the presence of locality in such references. This paper presents methods for detection of irregularity, feasibility of inspection, and finally, placement of inspectors and interprocessor communication schedules. We show that this process can be automated through extensions to an HPF/Fortran-77 distributed-memory compiler (PARADIGM) and a new runtime support for irregular problems (PILAR) that uses a variety of internal representations of communication patterns. We devise performance measures which consider the relationship between the inspection cost, the execution cost, and the number of times the executor is invoked so that a comparison of the competing schemes can be performed independent of the number of iterations. Finally, we show experimental results on an IBM SP-2 that validate our approach. These results show that dramatic improvements in both memory requirements and execution time can be achieved by using these techniques.
Antonio Lain, Dhruva R. Chakrabarti, Prithviraj Banerjee
IEEE Trans. Parallel Distributed Syst.1
1996 Compiler Support for Hybrid Irregular Accesses on Multicomputers
abstract
Article Compiler support for hybrid irregular accesses on multicomputers Share on Authors: Antonio Lain Hewlett Packard Avda. Graells 501, 08190 S. Cugat del Valles, Barcelona-Spain Hewlett Packard Avda. Graells 501, 08190 S. Cugat del Valles, Barcelona-SpainView Profile , Prithviraj Banerjee University of Illinois, 1308 West Main Street, Urbana, IL University of Illinois, 1308 West Main Street, Urbana, ILView Profile Authors Info & Claims ICS '96: Proceedings of the 10th international conference on SupercomputingJanuary 1996 Pages 1–9https://doi.org/10.1145/237578.237579Online:01 January 1996Publication History 2citation177DownloadsMetricsTotal Citations2Total Downloads177Last 12 Months0Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access
Antonio Lain, Prithviraj Banerjee
International Conference on Supercomputing1
1995 Advanced Compilation Techniques in the PARADIGM Compiler for Distributed-memory Multicomputers
abstract
The PARADIGM compiler project provides an automated means to parallelize programs, written in a serial programming model, for efficient execution on distributed-memory multicomputers.A previous implementation of the compiler based on the PTD representation allowed symbolic array sizes, affine loop bounds and array subscripts, and variable number of processors, provided that arrays were singleor multi-dimensionally block distributed.The techniques presented here extend the compiler to also accept multidimensional cyclic and block-c yclic distributions within a uniform symbolic framework.These extensions demand more sophisticated symbolic manipulation capabilities.A novel aspect of our approach is to meet this demand by interfacing PARADIGM with a powerful off-the-shelf symbolic package, MathematicaTM.This paper describes some of the MathematzcaTM routines that performs various transformations, shows how they are invoked and used by the compiler to overcome the new challenges, and presents experimental results for code involving cyclic and block-cyclic arrays as evidence of the feasibility of the approach.1
Ernesto Su, Antonio Lain, Shankar Ramaswamy, Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee
International Conference on Supercomputing2
1994 Techniques to overlap computation and communication in irregular iterative applications
abstract
There are many applications in CFD and structural analysis that can be more accurately modeled using unstructured grids. Parallelization of implicit methods for unstructured grids is a difficult and important problem. This paper deals with coloring techniques to overlap computation and communication during the solution of implicit methods on message passing distributed memory multicomputers. An evaluation of coloring techniques for partitioned unstructured grids is first presented. Results show the importance of using partitioning information during coloring. It is next shown that overlapping computation and communication can be formalized as a generalized coloring problem. Modified coloring algorithms are used for this purpose. The PARTI library has been extended to support non-blocking gather-scatter operations and used in conjunction with these algorithms. Practicality issues are evaluated with experimental results on an Intel Paragon multicomputer.
Antonio Lain, Prithviraj Banerjee
International Conference on Supercomputing1