Demo Data from EDBT 2026 / reviewers in the wild / expert
Geng-Dian Huang
dblp:77/4395
· DBLP profile ↗
7ranked-venue papers
3as first author
0since 2021 · last 2009
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 6 · 3 first-authorArtificial intelligence and machine learning · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
1 paper |
Logic in computer science · 56% Automated reasoning and model checking · 44% | |
| Software engineering, system software, and programming languages
1 paper |
Program verification · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Automated reasoning and model checking › model checking
temporal logic model checking |
0.1 | 1 | 2006 | TCTL Inevitability Analysis of Dense-Time Systems: From Theory to Engineering · IEEE Trans. Software Eng. 2006 |
Logic in computer science › temporal logic › real-time temporal logic
timed computation tree logic |
0.1 | 1 | 2006 | TCTL Inevitability Analysis of Dense-Time Systems: From Theory to Engineering · IEEE Trans. Software Eng. 2006 |
Program verification › model checking
software model checking |
0.0 | 1 | 2004 | BDD-Based Safety-Analysis of Concurrent Software with Pointer Data Structures Using Graph Automorphism Symmetry Reduction · IEEE Trans. Software Eng. 2004 |
Logic in computer science › temporal logic
branching-time temporal logic |
0.0 | 1 | 2006 | TCTL Inevitability Analysis of Dense-Time Systems: From Theory to Engineering · IEEE Trans. Software Eng. 2006 |
Program verification › model checking
symmetry reduction |
0.0 | 1 | 2004 | BDD-Based Safety-Analysis of Concurrent Software with Pointer Data Structures Using Graph Automorphism Symmetry Reduction · IEEE Trans. Software Eng. 2004 |
Methods — techniques the papers use, named apart from their topics
greatest fixpoint calculation · 0.1abstraction · 0.1process-symmetry reduction · 0.0graph automorphism · 0.0binary decision diagrams · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2009 | LTL Model Checking for Recursive Programs
Geng-Dian Huang, Lin-Zan Cai, Farn Wang |
ATVA | 1 |
| 2007 | Complete SAT-Based Model Checking for Context-Free Processes
Geng-Dian Huang, Bow-Yaw Wang |
ATVA | 1 |
| 2006 | TCTL Inevitability Analysis of Dense-Time Systems: From Theory to EngineeringabstractInevitability properties in branching temporal logics are of the syntax foralldiamphi, where phi is an arbitrary (timed) CTL (computation tree logic) formula. Such inevitability properties in dense-time logics can be analyzed with the greatest fixpoint calculation. We present algorithms to model-check inevitability properties. We discuss a technique for early decision on greatest fixpoint calculation which has shown promising performance against several benchmarks. We have experimented with various issues which may affect the performance of TCTL inevitability analysis. Specifically, our algorithms come with a parameter for the measurement of time-progress. We report the performance of our implementation with regard to various parameter values and with or without the non-Zeno computation requirement in the evaluation of greatest fixpoints. We have also experimented with safe abstraction techniques for model-checking TCTL inevitability properties. The experiment results help us in deducing rules for setting the parameter for verification performance. Finally, we summarize suggestions for configurations of efficient TCTL inevitability evaluation procedure Farn Wang, Geng-Dian Huang, Fang Yu 0001 |
IEEE Trans. Software Eng. | 2 |
| 2005 | Automatic Test Case Generation with Region-Related Coverage Annotations for Real-Time Systems
Geng-Dian Huang, Farn Wang |
ATVA | 1 |
| 2005 | Verifying Timed and Linear Hybrid Rule-Systems with RED
Farn Wang, Rong-Shiung Wu, Geng-Dian Huang |
SEKE | 3 |
| 2004 | BDD-Based Safety-Analysis of Concurrent Software with Pointer Data Structures Using Graph Automorphism Symmetry ReductionabstractDynamic data-structures with pointer links, which are heavily used in real-world software, cause extremely difficult verification problems. Currently, there is no practical framework for the efficient verification of such software systems. We investigated symmetry reduction techniques for the verification of software systems with C-like indirect reference chains like x/spl rarr/y/spl rarr/z/spl rarr/w. We formally defined the model of software with pointer data structures and developed symbolic algorithms to manipulate conditions and assignments with indirect reference chains using BDD technology. We relied on two techniques, inactive variable elimination and process-symmetry reduction in the data-structure configuration, to reduce time and memory complexity. We used binary permutation for efficiency, but we also identified the possibility of an anomaly of false image reachability. We implemented the techniques in tool Red 5.0 and compared performance with Mur/spl phi/ and SMC against several benchmarks. Farn Wang, Karsten Wolf, Fang Yu 0001, Geng-Dian Huang, Bow-Yaw Wang |
IEEE Trans. Software Eng. | 4 |
| 2003 | Symbolic Simulation of Real-Time Concurrent Systems
Farn Wang, Geng-Dian Huang, Fang Yu 0001 |
RTCSA | 2 |