Electronic Design Automation (EDA) plays a crucial role in classical chip design and significantly influences the development of quantum chip design. However, traditional EDA tools cannot be directly applied to quantum chip design due to vast differences compared to the classical realm. Several EDA products tailored for quantum chip design currently exist, yet they only cover partial stages of the quantum chip design process instead of offering a fully comprehensive solution. Additionally, they often encounter issues such as limited automation, steep learning curves, challenges in integrating with actual fabrication processes, and difficulties in expanding functionality. To address these issues, we developed a full-stack EDA tool specifically for quantum chip design, called EDA-Q. The design workflow incorporates functionalities present in existing quantum EDA tools while supplementing critical design stages such as device mapping and fabrication process mapping, which users expect. EDA-Q utilizes a unique architecture to achieve exceptional scalability and flexibility. The integrated design mode guarantees algorithm compatibility with different chip components, while employing a specialized interactive processing mode to offer users a straightforward and adaptable command interface. Application examples demonstrate that EDA-Q significantly reduces chip design cycles, enhances automation levels, and decreases the time required for manual intervention. Multiple rounds of testing on the designed chip have validated the effectiveness of EDA-Q in practical applications.

Quantum compilers play an essential role in the translation of quantum algorithms on quantum hardware. As the size of quantum programs increases, the problem of extreme compilation overhead becomes apparent. To address this problem, compilation frameworks with high-level intermediate representations such as QCOR have been introduced. However, these frameworks still face significant overhead from qubit mapping and optimizing sequence redundancy, resulting in challenges when compiling circuits to realistic hardware. In our paper, a low-cost optimizing compiler (LCOC) is proposed, which addresses the overhead in qubit mapping and enhanced the optimization capabilities. A qubit mapping optimizer based on the LLVM Polly is introduced in LCOC, which implements an efficient mapping of quantum programs containing specific loop types. While achieving low-cost mapping, it considerably reduces the depth of the circuit. We also implement an optimization sequence generator that leverages the modularity of LLVM and iterative compilation to provide LCOC with a more flexible and efficient optimization sequence. We conduct experiments with 100+ qubit circuits. Experiments show that LCOC is up to 1540× faster compared to Qiskit and 74× faster compared to QCOR in compile time. The average speedup relative to Qiskit and QCOR are 194× and 8.64×, respectively. In addition, it can effectively reduce the circuit depth by 50.32% compared to Qiskit and 83.5% compared to QCOR on average.

Medium-voltage dc (MVdc) power distribution grid is a key link to build dc power networks. In this article, a novel input-series-output-parallel modular dc transformer (DCT) with the high-frequency-link (HFL) voltage buck-boost matching strategy is proposed for MVdc grids application. The proposed DCT is composed of a current-fed switched capacitor structure and corresponding dual-active-bridge converters, and they need to operate collaboratively to achieve the great property. Comparing with the traditional switched capacitor-based DCT (SCDCT), the most salient merits of the proposed DCT include the HFL voltage buck-boost adaptive regulation, the low conducting and switching current in switches and the capacitor voltages self-balance characteristic. These merits are all beneficial for the improvement of efficiency, operating reliability, switching performance, and cost of DCT systems. Meanwhile, the proposed DCT reserves the advantages of SCDCT including redundant submodule design and dc fault isolating capability. The topology, buck-boost modulation principle, capacitor voltage self-balance analysis, switching behaviors, and comprehensive comparison with the traditional SCDCT are completed in detail. Finally, the experimental results validate the effectiveness and correctness of the proposed solution.

Advances in nanotechnology, large scale computing and communications infrastructure, coupled with recent progress in big data analytics, have enabled linking several billion devices to the Internet. These devices provide unprecedented automation, cognitive capabilities, and situational awareness. This new ecosystem--termed as the Internet-of-Things (IoT)--also provides many entry points into the network through the gadgets that connect to the Internet, making security of IoT systems a complex problem. In this position paper, we argue that in order to build a safer IoT system, we need a radically new approach to security. We propose a new security framework that draws ideas from software defined networks (SDN), and data analytics techniques; this framework provides dynamic policy enforcements on every layer of the protocol stack and can adapt quickly to a diverse set of industry use-cases that IoT deployments cater to. Our proposal does not make any assumptions on the capabilities of the devices - it can work with already deployed as well as new types of devices, while also conforming to a service-centric architecture. Even though our focus is on industrial IoT systems, the ideas presented here are applicable to IoT used in a wide array of applications. The goal of this position paper is to initiate a dialogue among standardization bodies and security experts to help raise awareness about network-centric approaches to IoT security.

SUMMARY: A high throughput Basic Local Alignment Search Tool (BLAST) system based on Web services is implemented. It provides an alternative BLAST service and allows users to perform multiple BLAST queries at one run in a distributed, parallel environment through the Internet. AVAILABILITY: It is available at http://mammoth.bii.a-star.edu.sg/webservices/htblast/index.html and at http://www.bii.a-star.edu.sg/jiren/download.html