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Michael P. Gilroy

dblp:77/5715 · DBLP profile ↗
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3ranked-venue papers
3as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 77% Hardware accelerators and domain-specific architectures · 23%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems › storage reliability
RAID
0.112006
FPGA based RAID 6 hardware accelerator · FPGA 2006
Storage systems › storage reliability › RAID
RAID-6
0.112006
FPGA based RAID 6 hardware accelerator · FPGA 2006
Storage systems
storage reliability
0.112006
FPGA based RAID 6 hardware accelerator · FPGA 2006

Methods — techniques the papers use, named apart from their topics

hardware RAID controller design · 0.1
YearPublicationVenuePosition
2011 RAID 6 Hardware Acceleration
abstract
Inexpensive, reliable hard disk storage is increasingly required in both businesses and the home. As disk capacities increase and multiple drives are combined in one system the probability of multiple disk failures increases. Through the adoption of RAID 6 the capability to recover from up to two simultaneous disk failures becomes available. In this article, we present three different RAID 6 implementations each tailored to support different target applications and optimized to reduce overall hardware resource utilization. We present an optimal Reed-Solomon-based RAID 6 implementation for arrays of four disks. We also present the smallest in terms of hardware resource utilization as well having the highest throughput RAID 6 hardware solution for disk arrays of up to 15 drives. Finally, we present an implementation supporting up to 255 disks in a single array.
Michael P. Gilroy, James Irvine 0001, Robert C. Atkinson
ACM Trans. Embed. Comput. Syst.1
2006 FPGA based RAID 6 hardware accelerator
abstract
Hard disk storage capacity has continued to rise whilst at the same time the cost per megabyte continues to fall. This, combined with increased usage of digital storage for documents, photography and video for both home and business use has led to increased need for reliable data storage system. Redundant arrays of inexpensive disks (RAID) have proven to offer the best characteristics for reliable storage. However, to date RAID based systems have been limited by their support for only single disk erasure tolerance.This paper introduces an efficient hardware RAID 6 controller on an FPGA capable offering support for uninterrupted access during double disk erasures and recovery.
Michael P. Gilroy, James Irvine 0001, William Berrie
FPGA1
2006 RAID 6 Hardware Acceleration
abstract
Hard disk storage capacity has continued to rise whilst at the same time the cost per megabyte continues to fall. This, combined with increased usage of digital storage for documents, photography and video for both home and business use has led to increased need for reliable data storage system. Redundant arrays of inexpensive disks (RAID) have proven to offer the best characteristics for reliable storage. However, to date RAID based systems have been limited, due to cost and circuit complexity, by their support for only single disk erasure tolerance. FPGAs allow us to overcome these difficulties and allow support for more complex storage algorithms. This paper introduces an efficient FPGA based hardware RAID 6 accelerator providing uninterrupted access during all single and double disk erasures and recovery
Michael P. Gilroy, James Irvine 0001
FPL1