This article explores a low-cost solution for generating modulated test stimuli using a standard digital automated test equipment (ATE). The technique relies on the generation of a modulated binary signal with appropriate encoding using a digital tester channel and the exploitation of one of its harmonic replicas. A theoretical analysis is presented in this article, considering a simple modulation scheme, i.e., the single-tone frequency or phase modulation. The relationship between the baseband spectrum and the harmonic replicas is established and an analytical expression of the modulated digital signal is derived, taking into account effects associated with discrete-time generation. A corruption estimator is then defined, enabling nondestructive sampling conditions to be identified. Experimental results are provided demonstrating the ability of the proposed solution to generate a modulated signal with the desired characteristics at a frequency higher than that of the test equipment.

This paper targets reduction of RF testing costs, focusing in particular on the generation of modulated stimuli for testing the reception chain of RF communication devices. It proposes an innovative low-cost solution that can be implemented on a standard digital Automated Test Equipment (ATE). The approach relies on the generation of a baseband digital signal with specific encoding, and the exploitation of one of its harmonic replicas as RF test stimulus. Spectral integrity of the signal around the targeted harmonic replica is ensured through a careful selection of the ATE sampling frequency. A generic methodology for practical implementation is presented and illustrated in this paper considering two popular digital modulation formats, namely Binary Phase-Shift Keying (BPSK) and Minimum-Shift Keying (MSK). Experimental validation is performed using a microcontroller unit (MCU) capable of operating at a sampling rate up to 500Mbps. Results show that despite the limited sampling capability of the equipment, test stimuli with the desired spectral characteristics in the 433MHz and 868MHz ISM bands can be generated, validating the proposed solution.

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In this paper, we explore a digital-based solution for the generation of 2.4GHz OSQSK test stimuli. The objective is to reduce the testing costs of ZigBee receivers by enabling their test on a standard digital Automatic Test Equipment (ATE). The proposed strategy relies on the generation of a modulated square wave signal in the intermediate frequency band using a digital tester channel, and the filtering of one of its harmonics to produce the RF signal. Appropriate modulation format has to be encoded in the square-wave signal so that the typical characteristics of a ZigBee signal are present in the chosen harmonic component. A dedicated pre-processing algorithm has been developed to determine this encoding. The proposed strategy is then evaluated through Matlab simulations, taking into account the practical constraints imposed by a standard digital ATE.

Error vector magnitude (EVM) or alternately offset EVM (OEVM) is one of the most important performance to verify for RF circuits, such as ZigBee transmitters in order to ensure that the quality of the generated modulated signal complies with the requirements of the wireless communication standard. The conventional solution to measure this performance relies on the use of an automatic test equipment (ATE) equipped with expensive RF channels. This article presents a low-cost solution that permits to realize EVM measurement using only a standard digital ATE. The approach is based on 1-bit undersampled acquisition of the RF modulated signal by a digital tester channel associated with a specifically tailored processing algorithm. This algorithm involves many different steps that are detailed in this article, including phase and amplitude fluctuation extraction, RF signal reconstruction, symbol clock recovery, symbol bits detection, and synthesis of reference data for EVM calculation. The proposed digital test solution is first evaluated through lab hardware experiments and then validated with EVM measurements on an industrial ATE.

Systems on a chip have seen their surface area increased by a factor of 10 and their consumption multiplied by 5 during the last ten years. Each technological node that enabled this integration has also added new constraints challenging the overall system reliability. In addition, the integration of analog/RF blocks adds specific issues, in particular the high cost of the required test equipment. It is therefore necessary to improve test and reliability solutions in order to guarantee the production yield and the system life-time. Moreover, the massive increase in the use of communicating systems has introduced security as a cornerstone of their development. The entire hardware production flow is therefore subject to security and trust issues requiring the development of dedicated test solutions. In this paper, we focus on LIRMM contributions in the HADES project especially with details on Embedded Test Instruments (ETIs) for reliability of digital ICs, low-cost RF test based on indirect DC measurements or digital ATE capture, management of secure scan access.

This paper presents a low-cost solution to perform power and spectral measurements on RF signals. More specifically, we target RF modulated signals such as 2.4 GHz signals delivered by ZigBee transmitters. The solution is based on 1-bit under-sampled acquisition of the RF signal, acquisition that can be realized using a standard digital ATE channel. The captured binary sequence is then fed to a dedicated postprocessing algorithm, which (i) extracts amplitude and phase variations and (ii) reconstructs the RF signal. From the reconstructed signal, it is possible to perform power and spectral measurements. The different steps of the post-processing algorithm are detailed in the paper. The validity of the technique is demonstrated through both simulations and hardware measurements.

This paper presents a low-cost solution to implement a functional test for RF ZigBee transmitter. More precisely, the objective is to enable symbol error detection for a 2.4 GHz OQPSK-modulated signal with half sine pulse shaping on a digital ATE. The test is based on 1-bit under-sampled acquisition ofthe RF signal with a standard digital tester channel. A dedicated post-processing algorithm is then applied, which (i) extracts the phase information from the captured binary sequence, (ii) reconstructs the RF modulated signal and (iii) performs the demodulation. The different steps ofthe post-processing algorithm are detailed in this paper. Simulation and experimental results are presented, demonstrating the ability of the technique to correctly retrieve the emitted symbol sequence using only the binary data captured by the digital tester channel.

This paper addresses a return of experience relative to the combination of several innovative educational approaches (classic lecture, per peers, and flipped classroom) to teach industrial test to undergraduate students from Polytech Montpellier engineering school. The objectives of the course were technical and educational: acquiring industrial test competencies in a way, students were the protagonists of their learning and for some topics they were the contributors of their peers'. At the end of the course, the teacher marked the students' skills and asked them to evaluate the course educational approaches completing a dedicated form created based on the F2A Louvain University one [1] to provide an objective and classifiable feedback. The paper presents the analysis of all results, states about this original experience and the future trends.

This paper addresses a project-oriented pedagogy to teach industrial testing of integrated circuits (IC) to Polytech Montpellier 4th year engineering school students, using the test platform of the CNFM. The objectives of the course are double: technical and educational. The students have to acquire knowledge (IC test and diagnosis methods, test results and graph analysis technics) and competences relative to IC testing (test program development, debugging, graph interpretation, solving defects in a device). The students also have to be attentive to the course in order to identify their understanding and gaps, to understand the reasons of acquiring these competences and the required course steps to achieve this goal in order to become actor and author of their learning. The teaching sequence combines concepts presentations, a tutorial for students self-training on the tester software tool, a project to apply these concepts and use the tool and brainstorming phases using POSTIT to allow students stating about their learning.

This paper presents an embedded test instrument for on-chip phase noise evaluation of analog/IF signals. The technique relies on 1 -- bit signal acquisition and dedicated processing to compute a digital signature related to the phase noise level. An appropriate algorithm based on on-the-fly processing of the 1-bit signal is defined in order to implement the BIST module with minimal hardware resources. The module is validated through behavioral and structural simulations. Its implementation in CMOS 140nm technology occupies only 7,885μm2, which represents an extremely small silicon area.

This paper introduces a new technique for low-cost phase noise production testing from 1-bit signal acquisition. The technique relies on reconstruction of phase fluctuation from the binary vector captured by a digital ATE channel. A dedicated post-processing algorithm is developed that permits phase noise evaluation from the analysis of the reconstructed time-domain phase fluctuation. The technique is validated through hardware measurements and results demonstrate an excellent agreement with conventional phase noise measurements.

This paper introduces a low-cost technique for phase noise testing of complex RF devices. The technique is based on the acquisition of the signal delivered on the IF output by a standard digital Automated Test Equipment (ATE). A dedicated digital processing algorithm is proposed that permits to achieve phase noise evaluation from the captured binary data. An experimental setup is developed to validate the proposed technique and measurements on actual analog signals demonstrate a very good agreement with conventional phase noise measurements.

Statistical analysis of analog circuits usually relies on the standard Monte Carlo method to estimate the yield of a circuit. However, this method is limited by a slow convergence rate which leads to a prohibitive number of simulations to reach a given accuracy. In this paper, we propose to combine the kernel-based distribution estimator with the control variates method in order to obtain an accurate yield estimation with only a few hundred simulations. With respect to the auxiliary variable needed for the control variates method, we propose a quick modeling technique based on local sensitivities.

In this paper, we investigate the use of standard digital ATE for the analysis of FM-modulated RF signals. The key idea is to use the 1-bit digitizer of a digital test channel in order to convert the frequency information contained in a FM-modulated signal into a timing information contained in a digital bit stream; a post-processing algorithm based on the concept of zero-crossing detection is then employed to retrieve this information. Coherent under-sampling is exploited to extend the capabilities of test equipment with a limited sampling frequency for the analysis of high-frequency signals. The proposed approach is evaluated on two different case studies related to LTE and GSM communication standards. Both simulation and hardware experiments are presented to demonstrate the viability of the technique.

This paper presents an innovative conditioning and read-out interface for resistive MEMS sensors. The proposed structure includes a digital offset compensation for robustness to process and temperature variations. Simulation results demonstrate an impressive resolution to power consumption ratio and a good immunity to environmental parameters. Experimental results finally demonstrate the efficiency of this promising read-out architecture.

This paper presents a reconstruction technique based on zero-crossing detection that permits analyzing FM-modulated signals using digital ATE channels. The technique relies on sampling of the analog/RF signal through a 1-bit comparator and the post-processing of the resulting bit stream. The proposed solution is validated through both simulation and hardware experiments.

This paper presents an electro-thermal on-line testing procedure applied to a MEMS magnetometer. The basic idea consists in: (i) using electro-thermal excitation to superimpose thermal variations to the normal operating mode; and (ii) processing the sensor output to extract the thermally-induced signal. In this work, we investigate the possibility of using a modulation of the excitation signal to produce a low-frequency thermally-based signal at the output of the Wheatstone bridge. Investigations using high-level simulations are conducted to determine appropriate test stimulus and suitable system architecture.

This paper introduces some practical BIST solutions as a basis for a future self-testable MEMS-based magnetic field sensor. It is demonstrated that slight modifications of the system architecture can be used to allow both on-chip generation of electro-thermal stimuli and preprocessing of the sensor response. The external response analysis and thus the test procedure are then strongly simplified and require only a standard digital automatic test equipment.

The development of low-cost go/no-go procedures for MEMS production testing is one of the main issues of MEMS manufacturability. In particular, the generation of low-cost test stimuli is a real challenge. In this paper, we investigate the generation of electrically-induced thermal stimuli to test electro-mechanical structures. Static, transient and harmonic responses are studied and it is demonstrated that they can be used for efficient detection and classification of several faulty devices.

This paper, which is mostly tutorial in nature, deals with the design of CMOS microelectromechanical systems MEMS using standard microelectronic computer-aided design tools. The proposed case study is an on-chip spectrum analyzer with an electronic mixer and a mechanical filter. Based on both analytical modeling and characterization, the filter is described using an analog hardware description language. System level simulations are then performed using a recently released simulation tool that offer new possibilities regarding the analysis of multidomain, multifrequency designs. Presented results include periodic steady state determination, small-signal analysis and noise investigation. The simulations demonstrate the ability of the proposed system to identify the harmonics of a 50-Hz square-wave signal, owing to the selectivity of the mechanical filter.

This paper introduces the use of the oscillation test technique for MEMS testing. This well-known test technique is here adapted to MEMS. Its efficiency is evaluated based on a case study: A CMOS electromechanical magnetometer.

In this paper, Oscillation-based Test Methodology (OTM) is evaluated in the context of MEMS testing. Both qualitative and quantitative evaluations of fault coverage are discussed and the impact of test on production yield is addressed. This article also introduces the Lorentz force as a low-cost stimulus for electro-mechanical structures.

This paper presents both the design and the characterization of a full CMOS magnetic field sensor. As an alternative to Hall effect sensors, it acts as a microscopic cantilever, deformed under the action of the Lorentz force.