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EDBT 2026 Demo / reviewers in the wild / expert

Prasun Raha

dblp:77/675 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 56% Integrated circuit design · 44%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › VLSI design
CMOS VLSI		 0.011998
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998
Electronic design automation
hardware verification and test		 0.011998
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998
Electronic design automation › circuit simulation
timing simulation		 0.011998
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998

Methods — techniques the papers use, named apart from their topics

finite element simulation · 0.0
YearPublicationVenuePosition
1998 ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips
abstract
In this paper, we present a new chip-level electrothermal timing simulator for CMOS VLSI circuits. Given the chip layout, the packaging specification, and the periodic input signal pattern, it finds the on-chip steady-state temperature profile and the resulting circuit performance. A tester chip has been designed for verification of ILLIADS-T, and very good agreement between simulation and experiment was found. Using this electrothermal simulator, temperature-dependent reliability and timing problems of VLSI circuits can be accurately identified.
Yi-Kan Cheng, Prasun Raha, Chin-Chi Teng, Elyse Rosenbaum
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2