Demo Data from EDBT 2026 / reviewers in the wild / expert
David Peter Barker
dblp:77/6920
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2001
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Reconfigurable computing and FPGAs · 100% |
Topics — the 1 heaviest of 1, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Reconfigurable computing and FPGAs › reconfigurable architecture
reconfigurable processor |
0.0 | 1 | 2001 | Delivering acceleration: the potential for increased HPC application performance using reconfigurable logic · SC 2001 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2001 | Delivering acceleration: the potential for increased HPC application performance using reconfigurable logicabstractSRC Computers, Inc. has integrated adaptive computing into its SRC-6 high-end server, incorporating reconfigurable processors as peers to the microprocessors. Performance improvements resulting from reconfigurable computing can provide orders of magnitude speedups for a wide variety of algorithms. Reconfigurable logic in Field Programmable Gate Arrays (FPGAs) has shown great advantage to date in special purpose applications and specialty hardware. SRC Computers is working to bring this technology into the general purpose HPC world via an advanced system interconnect and enhanced compiler technology. David Caliga, David Peter Barker |
SC | 2 |