Wenyan Yan

dblp:77/810 · DBLP profile ↗
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7ranked-venue papers
3as first author
6since 2021 · last 2026
0000-0003-2525-6769ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 3 first-author · 6 since 2021Human-computer interaction and ubiquitous computing · 1Applied, interdisciplinary, general and emerging computing · 1
YearPublicationVenuePosition
2026 DC-GCL: Dynamically Configurable Gate Control List in Automotive TSN Switch for ADAS
abstract
Time-Sensitive Networking (TSN) is widely used in Advanced Driver Assistance Systems (ADAS) owing to its high reliability, low latency, and deterministic transmission. ADAS utilizes automotive TSN switches to connect various sensors and actuators, facilitating deterministic communication for different data flows. The Time-Aware Shaper (TAS) in automotive TSN switch uses a pre-configured Gate Control List (GCL) for deterministic transmission of TSN flows. The GCL specifies the states of all gates (queues) and periodic transmission times, including Time-Triggered (TT), Audio Video Bridging (AVB), and Best-Effort (BE) queues. The widely used methods involve generating a GCL configuration file offline before scheduling, known as statically configured GCL. However, there are non-periodic but safety-critical Event-Triggered (ET) flows in ADAS, such as traffic incidents or alarms. ET flows are triggered by emergency events and require a timely response. In other words, ET flows should be transmitted immediately after TT flows. The statically configured GCL cannot provide timely scheduling for ET flows, as the time required for its reconfiguration is significantly longer than the time needed to configure ET flows. In this study, we propose a Dynamically Configurable GCL (DC-GCL) to adapt to the transmission of ET flows in automotive TSN switch for ADAS. We design a dynamic ET flow transmission solution in DC-GCL without affecting TT flows transmission. DC-GCL defines the ET flow as the second highest priority, allowing it to preempt the transmission of AVB and BE queues. We design a dynamic GCL scheduling window to calculate the queue and transmission time of ET flows. We further present a dynamic GCL configuration algorithm to initialize the GCL and enable dynamic GCL modification. We build a TSN-based ADAS prototype platform consisting of automotive-grade development boards and deploy DC-GCL in this platform. Experimental results show that DC-GCL significantly improves the scalability of GCL in different ADAS scenarios. Compared with statically configured GCL, DC-GCL reduces the end-to-end delay of TT flows by 40.9%-53.6% and ET flows by 81.1% -82.3%.
Dongsheng Wei, Wenyan Yan, Yixue Lei, Guoqi Xie
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2026 Paddle Lite on Zephyr: Deploying AI Models in RTOS for Inference Acceleration
abstract
With the rapid development of deep learning techniques in mobile and embedded devices, light-weight inference engines (e.g., Paddle Lite and TensorFlow Lite) are emerged. In some real-time application scenarios, these light-weight inference engines require time acceleration and low memory consumption. Paddle Lite is a well-known open-source inference engine that is fully functional. However, Paddle Lite only supports regular OS (e.g., Linux, Windows, and iOS), making it difficult to achieve time acceleration and low memory consumption for real-time application scenarios during inference. In this brief, we propose the Paddle Lite on Zephyr solution for inference acceleration in RTOS. We first propose a modular compilation method to incorporate the most basic functions of Paddle Lite. To address the system differences between RTOS and Linux, we resolve the system-level and compilation-level issues from modular compilation. We then load the Paddle Lite model into memory as a device when the system starts up. We further design an inference method that skips third-party libraries during inference and thus obtains the same inference results as Linux. We deploy the Paddle Lite on Zephyr and conduct experiments with seven classic Convolutional Neural Network (CNN) models on a single-core CPU. The experiment results show that the average inference time on Zephyr RTOS is reduced by 7%, and the average memory consumption is reduced by 78% compared to Linux. This work has merged an upstream branch of the Paddle Lite.
Guoqi Xie, Wenyan Yan, Chenglai Xiong, Zhenli He, Shaowen Yao 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2025 Quality of Service improvement for critical flows via dual-queue transmission in fault-tolerant Time-Sensitive Networking
Jinxi Sun, Wenyan Yan
J. Syst. Archit.3
2025 PFV2: Packet fragmentation with variable size and vigorous mapping in time-sensitive networking
Wenyan Yan, Dongsheng Wei, Renfa Li, Yixue Lei, Yuhang Jia, Guoqi Xie
J. Syst. Archit.1
2024 A conflict-free CAN-to-TSN scheduler for CAN-TSN gateway
Wenyan Yan, Jing Huang 0012, Ruiqi Lu, Renfa Li, Guoqi Xie
J. Syst. Archit.1
2024 A Mixed-Criticality Traffic Scheduler with Mitigating Congestion for CAN-to-TSN Gateway
abstract
The network architecture that Time-Sensitive Networking (TSN) is used as the backbone network and the Controller Area Network (CAN) serves as the intra-domain network is considered as the CAN-TSN interconnection network architecture, which has gained considerable attention within industrial embedded networks, such as spacecraft, intelligent automobiles, and factory automation. The architecture employs the CAN-TSN gateway as a central hub for transmitting and managing a significant volume of communications between the CAN domains and TSN. However, the CAN-TSN gateway faces a high congestion challenge due to the rapid growth in data volume, making it difficult to effectively support different time planning mechanisms provided by TSN. In this article, we propose a two-stage mixed-criticality traffic scheduler. The scheduler in the first stage adopts a Message Optimization Algorithm (MOA) to aggregate multiple CAN messages into a single TSN message (including the aggregation of critical and non-critical CAN messages), which reduces the number of CAN messages requiring transmission. In the second stage, the scheduler proposes a Message Scheduling Optimization Algorithm (MSOA) to schedule critical TSN messages. This algorithm reassembles all the critical CAN messages (within the un-schedulable TSN messages) to generate new TSN messages for rescheduling. Experimental results show that our proposed scheduler effectively improves the acceptance ratio of critical and non-critical CAN messages and outperforms the state-of-the-art message scheduling method in terms of acceptance ratio while improving the bandwidth utilization and the number of schedule table entries. We further construct a hardware platform to evaluate the performance of MSOA. The consistency between practical results and theoretical results shows the effectiveness of MSOA.
Wenyan Yan, Dongsheng Wei, Renfa Li, Guoqi Xie
ACM Trans. Design Autom. Electr. Syst.1
2007 Analysis of the efficiency of regional electricity input-output for China based on grey DEA model
abstract
In recent years, the influence of power shortage on the economic growth has attracted attention of the government departments and the academic community. To avoid the bias from the true value in data collecting process, we introduce the concept of grey numbers in this paper to make the depiction of phenomena objective. We analyze the efficiency of regional electricity input-output by means of Data Envelopment Analysis from the standpoint of efficiency. Results show: the central and western regions of China have high energy consumption in per output unit, with the western regions the highest and the eastern regions lower; almost every region of China has rarely made full use of its power input, with the western regions the worst. It is consistent with the conclusion that China’s economic development is accompanied by high energy consumption. Hence, for the sustainable and safe development of China, it is an emergency for relative departments to develop policies to make effective use of limited resources.
Hecheng Wu, Wenyan Yan, Sifeng Liu
SMC2