Demo Data from EDBT 2026 / reviewers in the wild / expert
Weili Ren
dblp:78/158
· DBLP profile ↗
5ranked-venue papers
1as first author
0since 2021 · last 2016
0000-0002-3162-185XORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 3 · 1 first-authorSystems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 61% Energy-efficient computing · 39% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Energy-efficient computing › low-power design
low-power processor design |
0.2 | 1 | 2016 | MaPU: A novel mathematical computing architecture · HPCA 2016 |
Processor architecture and microarchitecture
SIMD |
0.2 | 1 | 2016 | MaPU: A novel mathematical computing architecture · HPCA 2016 |
Processor architecture and microarchitecture › SIMD
SIMD datapath |
0.2 | 1 | 2016 | MaPU: A novel mathematical computing architecture · HPCA 2016 |
Methods — techniques the papers use, named apart from their topics
state-machine-based program model · 0.2multi-granularity parallel memory · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | MaPU: A novel mathematical computing architectureabstractAs the feature size of the semiconductor process is scaling down to 10nm and below, it is possible to assemble systems with high performance processors that can theoretically provide computational power of up to tens of PLOPS. However, the power consumption of these systems is also rocketing up to tens of millions watts, and the actual performance is only around 60% of the theoretical performance. Today, power efficiency and sustained performance have become the main foci of processor designers. Traditional computing architecture such as superscalar and GPGPU are proven to be power inefficient, and there is a big gap between the actual and peak performance. In this paper, we present the MaPU architecture, a novel architecture which is suitable for data-intensive computing with great power efficiency and sustained computation throughput. To achieve this goal, MaPU attempts to optimize the application from a system perspective, including the hardware, algorithm and corresponding program model. It uses an innovative multi-granularity parallel memory system with intrinsic shuffle ability, cascading pipelines with wide SIMD data paths and a state-machine-based program model. When executing typical signal processing algorithms, a single MaPU core implemented with a 40nm process exhibits a sustained performance of 134 GLOPS while consuming only 2.8 W in power, which increases the actual power efficiency by an order of magnitude comparable with the traditional CPU and GPGPU. Xueliang Du, Leizu Yin, Weili Ren, Shaolin Xie, Zhonghua Pu, Guangxin Ding, Mengchen Zhu, Lipeng Yang, Ruoshan Guo, Yongyong Yang, Wenqin Sun, Fabiao Zhou, NuoZhou Xiao |
HPCA | 6 |
| 2013 | Adaptive and autonomous power-saving scheme for beyond 3G user equipmentabstractBeyond 3G mobile networks will be data service centric. User equipment (UE) stays in the Connected State relatively long while supporting data services, so efficient power‐saving mechanisms for the Connected State are becoming more significant in order to prolong battery life of a handset. Discontinuous reception (DRX) has been a dominant approach for power saving in the Idle State and Connected State. In this study, a novel counter‐driven adaptive DRX (CDA‐DRX) scheme is proposed and analysed. The CDA‐DRX scheme is intended to present a generic and easy‐to‐implement algorithm to adaptively and autonomously adjust DRX cycle to keep up with changing user activity level. The scheme distinguishes itself from all other researches by minimising signalling overhead and easily balancing packet delivery latency and power consumption. Numerical analysis and system simulation showed that this scheme produces a better tuned DRX operation than the ones proposed in literature or suggested in the standards. Enjie Liu, Jie Zhang 0003, Weili Ren |
IET Commun. | 3 |
| 2011 | Adaptive DRX Scheme for beyond 3G Mobile HandsetsabstractBeyond 3G mobile networks will be data service centric. It is anticipated that UE will stay in the Connected State relatively long while supporting data services, so efficient power saving mechanisms for the Connected State are more significant in order to prolong the active time of a handset. Discontinuous Reception (DRX) is a dominant approach for power saving in the Idle State and the Connected State. In this paper, a novel Counter-Driven Adaptive DRX (CDA-DRX) scheme is proposed and analyzed. It intends to present a generic and easy-to-implement adaptive DRX scheme that keeps up with the change of user activity level. This autonomous and adaptive power saving scheme distinguishes itself from all other researches surveyed so far from literature by minimizing signaling overhead and easy balancing between packet delivery latency and power saving performance according to QoS requirement of established data services. Enjie Liu, Jie Zhang 0003, Weili Ren |
GLOBECOM | 3 |
| 2011 | A Counter-Driven Adaptive Sleep Mode Scheme for 802.16e NetworksabstractData services, especially multimedia services drain battery quickly. Hence, it becomes more and more important to reduce power consumption in order to prolong active time of a mobile station. Three types of sleep mode schemes were defined in 802.16e for power saving. Sleep window size is either fixed or exponentially increased in these schemes. Past researches showed that power saving performance can be improved by carefully adjusting the sleep window size. Past researches also tried to balance the power saving performance and packet delivery latency, which contradict with each other. In this paper, a novel counter-driven adaptive sleep mode scheme is proposed and analyzed. It intends to present a generic and easy-to-implement adaptive sleep window scheme that keeps up with the change of user activity level. This autonomous and adaptive power saving scheme distinguishes itself from all other researches surveyed so far in the literature by minimizing signaling overhead and easily balancing between packet delivery latency and power saving performance according to QoS requirement of established data services. Enjie Liu, Jie Zhang 0003, Weili Ren |
VTC Spring | 3 |
| 2000 | Modelling of Capture Effect and Analysis in LEO Satellite ChannelabstractCapture effect can improve the throughput of random multiple access protocols. An evaluation model of the capture effect is proposed for coherent BPSK demodulation. The model introduces the concept of carrier synchronisation probability conditioned upon the carrier-to-interference ratio into the evaluation of the capture probability. Moreover, the effect of bit-sync offset of interfering packets on the capture probability is also taken into account. An attempt is made by means of the proposed model to investigate the capture effect in the LEO satellite channel. The result shows that a relatively large link margin can result in a remarkable capture probability, and consequently benefit slotted ALOHA protocols with a substantial throughput improvement. Weili Ren, Jeff Ward, Stephen Hodgart, Martin N. Sweeting |
ICC (1) | 1 |