The artwork of integrated circuit designs is usually available in the form of hierarchical specification, in which each cell is made up of geometric primitives and references to other cells. Such a representation captures structure and repetition in the layout. As the realizable device count of integrated circuits increases with every passing year there is an increasing trend towards structured design approaches that result in even greater degrees of regularity and hierarchy. Yet the typical approach to design verification requires fully instantiating the hierarchical representation thereby removing all structure from it. Consequently much time is spent repeating the analyses of identical cells. This paper presents a general approach to exploiting hierarchy and repetition in the analysis of integrated circuit designs, and includes details of a circuit extraction algorithm that uses this approach. The implementation and performance of such a system is also described.

Clipping is the process of determining how much of a given line segment lies within the boundaries of the display screen. Homogeneous coordinates are a convenient mathematical device for representing and transforming objects. The space represented by homogeneous coordinates is not, however, a simple Euclidean 3-space. It is, in fact, analagous to a topological shape called a “projective plane”. The clipping problem is usually solved without consideration for the differences between Euclidean space and the space represented by homogeneous coordinates. For some constructions, this leads to errors in picture generation which show up as lines marked invisible when they should be visible. This paper will examine these cases and present techniques for correctly clipping the line segments.

No abstract available.

In 1974 Ed Catmull developed a new algorithm for rendering images of bivariate surface patches. This paper describes extensions of this algorithm in the areas of texture simulation and lighting models.The parametrization of a patch defines a coordinate system which is used as a key for mapping patterns onto the surface. The parametric values within each picture element are input to a pattern definition function. A weighted average of the values of this function over the picture element scales the intensity of that picture element. By suitably defining the pattern function, various surfaces textures can be simulated. The shape and size of this weighting function is chosen using digital signal processing theory.The other problem addressed here concerns lighting models. The patch rendering algorithm allows accurate computation of the surface.