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George R. Couranz

dblp:78/4404 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1975
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
asynchronous circuit design		 0.011975
Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region · IEEE Trans. Computers 1975
Integrated circuit design
digital circuit design		 0.011975
Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region · IEEE Trans. Computers 1975
Integrated circuit design
metastability		 0.011975
Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region · IEEE Trans. Computers 1975
Integrated circuit design › digital circuit design › sequential circuit design
synchronizer		 0.011975
Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region · IEEE Trans. Computers 1975

Methods — techniques the papers use, named apart from their topics

probabilistic analysis · 0.0
YearPublicationVenuePosition
1975 Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region
abstract
The interaction problem between asynchronous logic elements is formulated with emphasis on the synchronizer. A detailed analytic treatment of the binary flip-flop action in the metastable region is presented. The principle result is to predict, in a probabilistic manner, the time necessary to move from the metastable point to one of the stable boundaries. The effects of circuit time constant and circuit noise are discussed in detail. Theoretical results are correlated with laboratory measurements and suggestions for acceptable probability of error performance are given.
George R. Couranz, Donald F. Wann
 IEEE Trans. Computers1