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John Eleazar Q. Delos Reyes

dblp:78/4820 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2005
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware test › integrated circuit testing › RAM testing
coupling faults
0.112005
New data-background sequences and their industrial evaluation for word-oriented random-access memories · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005
Electronic design automation › hardware verification and test
memory testing
0.112005
New data-background sequences and their industrial evaluation for word-oriented random-access memories · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005

Methods — techniques the papers use, named apart from their topics

industrial evaluation · 0.1fault model development · 0.1
YearPublicationVenuePosition
2005 New data-background sequences and their industrial evaluation for word-oriented random-access memories
abstract
This paper improves upon the state of the art in the testing of intraword coupling faults (CFs) in word-oriented memories. It first presents a complete set of fault models for intraword CFs. Then, it establishes the data background sequence and tests for each intraword CF, as well as a test with complete fault coverage of the targeted faults. All introduced tests will be evaluated industrially, together with the most well-known memory tests. The tests will be applied to big arrays with an interleaved bit-organization as well as to small arrays with an adjacent bit-organization in order to investigate the influence of the memory organization on the intraword CFs. The test results show that the intraword CFs are also significantly important for interleaved memories, even when the cells within a single cell are not physically adjacent. This is due to coupling between the adjacent bit lines and word lines running across the memory array. The paper concludes that intraword CFs should be considered for any serious test purpose or leave substantial defects undetected, especially when considering a high-volume production and a very low defect-per-million (DPM) level.
Said Hamdioui, John Eleazar Q. Delos Reyes
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2