There is a growing interest in quantum computers and quantum algorithm development. It has been proved that ideal quantum computers, with zero error rates and large decoherence times, can solve problems that are intractable for today’s classical computers. Quantum computers use two resources, superposition and entanglement, that have no classical analog. Since quantum computer platforms that are currently available comprise only a few dozen of qubits, the use of quantum simulators is essential in developing and testing new quantum algorithms. We present a novel quantum simulator based on memristor crossbar circuits and use them to simulate well-known quantum algorithms, namely the Deutsch and Grover quantum algorithms. In quantum computing the dominant algebraic operations are matrix-vector multiplications. The execution time grows exponentially with the simulated number of qubits, causing an exponential slowdown in quantum algorithm execution using classical computers. In this work, we show that the inherent characteristics of memristor arrays can be used to overcome this problem and that memristor arrays can be used not only as independent quantum simulators but also as a part of a quantum computer stack where classical computers accelerators are connected. Our memristive crossbar circuits are re-configurable and can be programmed to simulate any quantum algorithm.

Over the last years there has been significant progress in the development of quantum computers. It has been demonstrated that they can accelerate the solution of various problems exponentially compared to today's classical computers, harnessing the properties of superposition and entanglement, two resources that have no classical analog. Since quantum computer platforms that are currently available comprise only a few tenths of qubits, as well as the access to a fabricated quantum computer is time limited for the majority of researchers, the use of quantum simulators is essential in developing and testing new quantum algorithms. Taking inspiration from previous work on developing a novel quantum simulator based on memristor crossbar circuits, in this work, a framework that automates the circuit design of emulated quantum gates is presented. The proposed design framework deals with the generation and programming of memristor crossbar configuration that incorporates the desirable quantum circuit, leading to a technology agnostic design tool. To such a degree, various quantum gates can be efficiently emulated on memristor crossbar configurations for various types of memristive devices, aiming to assist and accelerate the fabrication process of a memristor based quantum simulator.

Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.

Quantum-dot fabrication and characterization is a well-established technology, which is used in photonics, quantum optics, and nanoelectronics. Four quantum-dots placed at the corners of a square form a unit cell, which can hold a bit of information and serve as a basis for quantum-dot cellular automata (QCA) nanoelectronic circuits. Although several basic QCA circuits have been designed, fabricated, and tested, proving that quantum-dots can form functional, fast and low-power nanoelectronic circuits, QCA nanoelectronics still remain at its infancy. One of the reasons for this is the lack of design automation tools, which will facilitate the systematic design of large QCA circuits that contemporary applications demand. Here we present novel, programmable QCA circuits, which are based on crossbar architecture. These circuits can be programmed to implement any Boolean function in analogy to CMOS field-programmable gate arrays and open the road that will lead to full design automation of QCA nanoelectronic circuits. Using this architecture we designed and simulated QCA circuits that proved to be area efficient, stable, and reliable.

Cellular automata (CAs) have been widely used to model and simulate physical systems and processes. CAs have also been successfully used as a VLSI architecture that proved to be very efficient at least in terms of silicon-area utilization and clock-speed maximization. Quantum cellular automata (QCAs) as one of the promising emerging technologies for nanoscale and quantum computing circuit implementation, provides very high scale integration, very high switching frequency and extremely low power characteristics. In this paper we present a new automated design architecture and a tool, namely DATICAQ (Design Automation Tool of 1-D CAs using QCAs), that builds a bridge between 1-D CAs as models of physical systems and processes and 1-D QCAs as nanoelectronic architecture. The QCA implementation of CAs not only drives the already developed CAs circuits to the nanoelectronics era but improves their performance significantly. The inputs of the proposed architecture are CA dimensionality, size, local rule, and initial and boundary conditions imposed by the particular problem. DATICAQ produces as output the layout of the QCA implementation of the particular 1-D CA model. Simulations of CA models for zero and periodic boundary conditions and the corresponding QCA circuits showed that the CA models have been successfully implemented.

Bacteria evolved cell to cell communication processes to gain information about their environment and regulate gene expression. Quorum sensing is such a process in which signaling molecules, called autoinducers, are produced, secreted and detected. In several cases bacteria use more than one autoinducers and integrate the information conveyed by them. It has not yet been explained adequately why bacteria evolved such signal integration circuits and what can learn about their environments using more than one autoinducers since all signaling pathways merge in one. Here quantum information theory, which includes classical information theory as a special case, is used to construct a quantum gate circuit that reproduces recent experimental results. Although the conditions in which biosystems exist do not allow for the appearance of quantum mechanical phenomena, the powerful computation tools of quantum information processing can be carefully used to cope with signal and information processing by these complex systems. A simulation algorithm based on this model has been developed and numerical experiments that analyze the dynamical operation of the quorum sensing circuit were performed for various cases of autoinducer variations, which revealed that these variations contain significant information about the environment in which bacteria exist.

Power is becoming a critical constraint for designing embedded applications because the amount of power available to these portable systems is limited due to battery life. On the other hand, many of the emerging real-time applications designed for battery-operated systems, such as wireless communication, and audio and video processing, tend to compete in order to gain a larger fraction of the energy provided by the common (public) source. It is known that both cooperation and competition are very important for every vivid system operation and evolution because cooperation leads to the formation of more complex systems and competition is crucial for the efficient operation, especially when common sources are used. In this paper, we study the cooperation between individuals, i.e., power-aware jobs, of a group, i.e., an embedded system, in a power-aware changing environment, using a variation of the public goods game, in which the changing environment is modeled by a variable multiplication factor. Based on this PGG, we aim to find out what are the most essential conditions under which the cooperation between the power-aware jobs in periodically and abruptly power-aware changing environments of the embedded system is emerging and sustained. The most interesting result is that even in harsh situations, the jobs maintain a degree of cooperation to exploit favorable future energy changes in the power-aware environment.

The increasing complexity of computer networks calls for the development of new models for their simulation. Cellular automata (CAs) are a well-known and successful model for complex systems. This paper presents a system for modeling and simulation of computer networks based on CAs. More specifically, a 2D NaSch CA computer network model has been developed, and several networks were simulated. Algorithms for connectivity evaluation, system reliability evaluation, and shortest path computation in a computer network have also been implemented. Our system, called Net_CA system, was designed and developed as an interactive tool that offers automated modeling with the assistance of a dynamic and user-friendly graphical environment. The proposed system also produces automatically synthesizable very high speed integrated circuits hardware description language code leading to the parallel hardware implementation of the aformentioned CA algorithms. In terms of circuit design and layout, ease of mask generation, silicon area utilization, and maximization of achievable clock speed, CAs are perhaps the computational structures best suited for a fully parallel very large scale integrated realization. The simulation algorithms developed in the present paper offer high flexibility. Furthermore, connection reliability and other important parameters are inputs to the algorithms, rendering Net_CA a very reliable and fast simulator for wireless networks, ad hoc networks, and generally, for low connection reliability networks.

A number of novel voltage-mode multiple-valued logic circuits are introduced. Adopting the main features of the true single-phase clocked logic, efficient quaternary logic dynamic and pseudo-static latches, dynamic and static master-slave storage units, and uni-signal controlled pass gates are proposed. These circuits use two kinds of MOS transistors, i.e., enhancement and depletion mode, each of which has two threshold voltages. The proposed circuits exhibit regular, modular, and iterative structure, which means that the MVL circuits are VLSI implementable and can be easily re-designed for any radix of an arithmetic system. Since we use only clock signal, the derived circuits have low power dissipation. Comparisons with existing circuits prove substantial improvements in terms of speed, power consumption, and transistor count.