Demo Data from EDBT 2026 / reviewers in the wild / expert
Eka Ginting
dblp:78/721
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 1995
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 43% Storage systems · 28% Memory systems · 28% | |
| Software engineering, system software, and programming languages
1 paper |
Operating systems · 100% |
Topics — the 9 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems › buffer management
buffer allocation |
0.0 | 1 | 1995 | Informed Prefetching and Caching · SOSP 1995 |
Memory systems
cache management |
0.0 | 1 | 1995 | Informed Prefetching and Caching · SOSP 1995 |
Storage systems
file systems |
0.0 | 1 | 1995 | Informed Prefetching and Caching · SOSP 1995 |
Memory systems › cache
prefetching |
0.0 | 1 | 1995 | Informed Prefetching and Caching · SOSP 1995 |
Electronic design automation › hardware verification and test
hardware verification |
0.0 | 1 | 1993 | SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism Algorithm · DAC 1993 |
Electronic design automation › physical design
layout verification |
0.0 | 1 | 1993 | SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism Algorithm · DAC 1993 |
Electronic design automation
physical design |
0.0 | 1 | 1993 | SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism Algorithm · DAC 1993 |
Electronic design automation › hardware verification and test › reverse engineering
subcircuit identification |
0.0 | 1 | 1993 | SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism Algorithm · DAC 1993 |
Operating systems › i/o › i/o subsystem
i/o scheduling |
0.0 | 1 | 1995 | Informed Prefetching and Caching · SOSP 1995 |
Methods — techniques the papers use, named apart from their topics
cost-benefit analysis · 0.0subgraph isomorphism · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1995 | Informed Prefetching and CachingabstractIn this paper, we present aggressive, proactive mechanisms that tailor file system resource management to the needs of I/O-intensive applications. In particular, we show how to use application-disclosed access patterns (hints) to expose and exploit I/O parallelism, and to dynamically allocate file buffers among three competing demands: prefetching hinted blocks, caching hinted blocks for reuse, and caching recently used data for unhinted accesses. Our approach estimates the impact of alternative buffer allocations on application execution time and applies cost-benefit analysis to allocate buffers where they will have the greatest impact. We have implemented informed prefetching and caching in Digital’s OSF/1 operating system and measured its performance on a 150 MHz Alpha equipped with 15 disks running a range of applications. Informed prefetching reduces the execution time of text search, scientific visualization, relational database queries, speech recognition, and object linking by 20-83%. Informed caching reduces the execution time of computational physics by up to 42 % and contributes to the performance improvement of the object linker and the database. Moreover, applied to multiprogrammed, I/O-intensive workloads, informed prefetching and caching increase overall throughput. 1 R. Hugo Patterson, Garth A. Gibson, Eka Ginting, Daniel Stodolsky, Jim Zelenka |
SOSP | 3 |
| 1993 | SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism AlgorithmabstractThe problem of finding subcircuits in a larger circuit arises in many contexts in computer-aided design.This is a problem currently solved using ad hoc Fellowship.,, of CMOS circuit examples. Miles Ohlrich, Carl Ebeling, Eka Ginting, Lisa Sather |
DAC | 3 |